System Control Block Diagram - Philips VR407/77 Service Manual

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4.16

SYSTEM CONTROL BLOCK DIAGRAM

5
CAP MDA
CAP REV(L)
M
CAP CTL V
CAP FG
CON1
DRUM MOTOR
DRUM CTL V
3
D.PG
4
D.FG
4
5
M
5 5 LOADING MOTOR
LDM2
M
LDM1
3
ROTARY
ENCODER
1 2
A/C HEAD
A/C HEAD
CN1
CTL HEAD
2
CTL
CTL HEAD
1
2
I2C DATA A/V
I2C CLK A/V
TO
VIDEO/AUDIO
V. PULSE
VIDEO ENV
TO
VIDEO/AUDIO
V TO OSD
TO
V FROM OSD
TERMINAL
1
A
MAIN ( SYSCON )
0 3
CN3001
6
3
2
WF1
WF2
CN3002
3
4
5
WF3
PC3001
PHOTO
SENSOR PC3002
IC3002
PHOTO
( LOADING MOTOR
SENSOR
VOLTAGE CONTROL )
CN3003
2 7
2 OUT 2 IN 1
4 9
OUT 1 IN 2
1
1
DRIVE VOLTAGE
Vref
CONTROL
Q3003
CN3004
LSB 1
LSC
2
LSA 3
CN2001
( - )
6
( + )
7
D.FF
VIDEO SECTION ( ON SCREEN )
Note : For the waveforms in this block diagram , refer to page 4-25.
B C
IC3001
( SYSTEM CONTROL MICRO PROCESSOR )
94
40
CAP REV (L)
XC IN
33
41
CAP CTL V
XC OUT
68
C.FG IN
37
X OUT
38
34 X IN
DRUM CTL V
66
D.PG IN
65
D.FG IN
64
REC SAFETY
1
SP FG
84
END SENSOR
2
TU FG
12
LMC2
25
11
RESET
LMC1
99
LMC3
62
LSB
63
LSC
61
LSA
TP4001
CTL. P
WF4
56
76
I2C DATA
CTL AMP OUT
57
I2C CLK/TEST
75
CTL(-)
74
CTL(+)
WF5
17 (SERIAL MEMORY)
I2C DATA A/V
18
I2C CLK A/V
23
D.FF
24
V. PULSE
82
VIDEO ENV
50
LPF SYN IN
35
A.MUTE(H)
27
N.REC ST(H)
49
4
V TO OSD
N.REC(H)
WF6
47
VIDEO OSD OUT
WF7
D 4-29 4-30 E
C3018
Timer Clock
X3002
TIMER CLOCK
(32KHz)
X3001
MAIN SYSTEM
CLOCK
(14.32MHz)
+5V
S3001 REC SAFETY SW
END
Q3002
SENSOR
D3004
1 2
RESET AL5.8V SYS
IC3003
3
( RESET )
6
SCL
5
SDA
IC3004
F G
TO FMA/DEMOD
I2C DATA
I2C CLK
A.MUTE(H)
A.MUTE(H)
TO
N.REC ST(H)
VIDEO/AUDIO
N.REC(H)
H