Sony TRINITRON KV-32FV27 Service Manual page 5

ADJUSTMENT ITEMS (3 OF 6)
Register
Name
24 ST0S
25 WSC
26 VTRH
27 VTRR
LDSR
28
PWRE
29
VAPG
30
VAPI
31
32 TEST
33 YPFT
34 YPFG
35 V1PS
VEGS
36
CC3N
37
C0HS
38
39 CLPH
40 SEL2
41 SEL1
42 YHCO
43 YHCG
OVST
44
CSHD
45
KCTT
46
47 SHT
48 VCT
49 OTT
50 CL2D
CGGT
51
CLEB
52
CGT
53
HPLL
54
55 BPLL
56 FSCF
57 PLLF
58 KILR
HSSL
59
VSSL
60
BGPS
61
62 BGPW
63 ADCL
64 ADPD
65 NSDW
CNRF
66
0 SHPR
1 BLAD
SRTS
2
YNR
3
GIRE
4
5 DAC1
DAC2
6
Description Data
Range
Select ST0 Pin Output Signal
Noise Detection Coring
H-sync Non-Standard Detection Hysteresis
H-sync Non-Standard Detection Sensitivity
Frame Sync Non-Std Detection Sensativity
Internal ADC Input Range
Vertical Aperture Compensation Gain
0-31
Vertical Aperture Comp Convergence
Test Bit
Y Peaking Filter Center Frequency
Y Peaking Filter Gain 0-15
Horizontal Dot Supression Level
Vertical Dot Supression Level
Line Comb C Separation Filter
C Signal Delay Time at NR
Y-ADC Clamp Test Bit
DC Detection High Freq Sensativity
DY detection Low Freq Sensativity
Y High Freq Coring
Y High Freq Coring Gain
Non Standard Detection Test Bit
H/V counter Test Bit
H/V counter Test Bit
Non Standard Detection Test Bits
H/V counter Test Bit
H/V counter Test Bit
Clock Generator Test Bit
Clock Generator Test Bit
Clock Generator Test Bit
Clock Generator Test Bit
Horizontal PLL Filter
Burst PLL Filter
Burst Extraction Gain
PLL Loop Gain
Killer Detection Reference 0-15
Horizontal Sync Slice Level 0-15
0-15
Vertical Sync Slice Level
0-15
Burst Gate Start Position
Internal Burst Gate Pulse Width 0-15
ADC Clock Delay
ADC Power Down
Non Standard Detection Test Bit
CNR Section Test Bit
Controls both DL APACON and SRT 0-127
Black Area Detect
SRT Start Amplitude
Controls YNR ON/OFF
Gamma Correction Start Point
1 bit DAC Output
1 bit DAC Output
Adj/Fix Initial 32"
Data FV
0-3 FIX 1
0-3 FIX 1
0-3 FIX 1
0-3 FIX 1
0-3 FIX 2
0,1 FIX 0
0-7
FIX 4
FIX 12
0,1 FIX 0
0-3 FIX 3
FIX 7
0-3 FIX 2
0-3 FIX 2
0,1
FIX 0
0,1
FIX 0
0,1 FIX 0
0,1 FIX 0
0,1 FIX 0
0-3 FIX 1
0,1 FIX 0
0,1 FIX 0
0,1
FIX 0
0-3
FIX 0
0,1 FIX 0
0,1 FIX 0
0,1 FIX 0
0,1 FIX 1
0,1 FIX 0
0,1
FIX 0
0,1
FIX 0
0,1
FIX 1
0,1 FIX 1
0,1 FIX 0
0,1 FIX 1
FIX 3
FIX 12
FIX 8
FIX 5
FIX 10
0-3 FIX 3
0,1 FIX 1
0,1 FIX 0
0,1 FIX 0
Fix by Model 52 52
0-3 FIX 0
0-3 FIX 3
0,1
FIX 1
0-3
FIX 3
0,1 FIX 0
0,1
FIX 0
— 18 —
KV-32FV27 / 36FS13 / 36FS17 / 36FV27 / 38FS17
36"/38" Comments
FS FV
1 External Y-ADC clamp pulse
1 1LSB coring for noise detection circuit
1 Low hysteresis (2 clock pulses)
1 Medium sensativity (+/- 8 clock pulses)
2 Low sensativity (1.5 clock pulses)
0 Same input range on Y-ADC and C-ADC
0: Correction OFF, 7: Max Correction
4
0: Correction OFF, 31: Max Correction
12
0 Normal Mode
3 4.22 MHz
6 0: -1 gain, 15: 0.875 gain
2 Medium suppression
2 Medium supression
Narrow bandwidth
0
1H Delay
0
0 Normal Mode
0 Low sensativity, Close to still pictures
0 Low sensativity, Close to still pictures
0 Small Amount of coring (+/- 1LSB)
0 Gain = 1
0 Normal Mode
Normal Mode
0
Normal Mode
0
0 Normal Mode
0 Normal Mode
0 Normal Mode
1 Normal Mode
0 Normal Mode
Normal Mode
0
Normal Mode
0
Quick convergence
1
1 Quick convergence
0 High gain
1 High gain, quick convergence
3 0: Detection off, 15: High detection sensativity
12 0: 4LSB, 15: 19LSB
0: HSSL + 0LSB, 15: HSSL + 15LSB
8
0: Hsync center + 2ms, 15: Hsync center +5.75ms
5
10 0: 0.5ms, 15: 4.25ms
3 0: 0ns, 3: 20.5ns (typical)
1 Stop ADC when not in use
0 Normal Mode
0 Normal Mode
59 52 0: Minimum, 127: Maximum
0 0: 10IRE, 1: 20IRE, 2: 30IRE, 3: 40IRE
3 0: 7IRE, 1: 10IRE, 2: 14IRE, 3: 28IRE
YNR ON
1
0: 70IRE, 1: 80IRE, 2: 90IRE, 3: OFF
3
0 Open
Open
0