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OM5-BP-8-MUX-C 8 POSITION ANALOG I/O BACKPANEL, MULTIPLEXED
DESCRIPTION
The OM5-BP-8-MUX-C backpanel (Figure 15) can accept up to eight OM5
modules in any combination. It can be mounted on the OMX-1363-C 19-inch
metal rack. The OM5-BP-8-MUX-C has two analog buses; one for analog
input and one for analog output. This two-bus configuration takes advantage
of the switch controlled outputs on the input modules and the track-and-hold
inputs on the output modules. A temperature sensor is mounted on each
channel to provide cold junction compensation for thermocouple input
modules (See Figure 16 for schematic). Field connections are terminated
with four screw terminals at each module site. Up to eight OM5-BP-8-MUX-
C backpanels may be daisy-chained. Use OMX-CAB-01-C cable for daisy
chaining and OMX-1315-xx-C cable for connecting to host computer.
Jumpers on the OM5-BP-8-MUX-C permit user selection of low (i.e.
channels 0-7) or high (i.e. channels 8-15) addresses.
Tolerance: ±0.020" (±0.50mm)
26 Conductor
Male Pin Connector P1
Swaged
Standoff
Thru Hole
0.15" (3.8mm) Dia.
(6)
0.75"
(19.1mm)
2.25"
(57.2mm)
3.15"
(80.2mm)
FIGURE 15. OM5-BP-8-MUX-C Analog I/O Backpanel.
ELECTRICAL
ADDRESS SELECTION
Module read and write addresses may be selected as low (channels 0-7) or
high (channels 8-15) using the four sets of 3 position jumpers labeled J5
through J8. Place a jumper over the two pins furthest from the field I/O
termination blocks on all four sets to select a low address (factory configu-
ration) or over the two pins closest to the field I/O termination blocks on all
four sets to select a high address.
The OM5-BP-8-MUX-C backpanel has address decoding circuitry to allow
multiplexing any combination of up to 8 input or output modules. Capability
is also provided in the address decode circuitry to expand the system to 64
channels (eight OM5-BP-8-MUX-C backpanels) of multiplexed input or
output. Jumpers select which set of 16 addresses are assigned to a particular
SPECIFICATIONS
5.8"
(1)
(147.3mm)
P2
P3
J7
P1
1
6
J8
L
H
J5
J6
L
H
J1 J2 J3 J4
Pin 2
+5VDC Supply
Pin 1
Read Address
Selection Jumper
Write Address
Selection Jumper
NOTES: (1) Connector is Berg 65863-075 or equivalent.
backpanel. The Read Address group assigns a set of 16 addresses for input
modules, and the Write Address group assigns a set of 16 addresses for
output modules. The table below shows the correlation of jumper position to
address range.
Address Selection Jumpers
45
Operating Temperature:
–40°C to +85°C
95% relative humidity, non-condensing
Interface Connector:
Field
High Density Screw Clamp, 14 AWG Max
Logic
26-pin, male header connector
Address Input Logic Levels:
Max Logic "0"
0.8V
Min Logic "1"
2.0V
I
Input Current, "0" or "1"
0.1µA max at 25°C
I
1.0µA max –25°C to +85°C
RD EN\ or WR EN\ Signal Delay
from Connector P1 to Channels 0-7
Standalone (address 0-7)
51ns at 25°C
64ns at –25°C to +85°C
Expanded (address 8-63)
100ns at 25°C
126ns at –25°C to +85°C
10.0"
(254.0mm)
9.7"
(246.3mm)
9.5"
(241.3mm)
Sockets for Current
Conversion Resistors, OMX-1362-C
Mating connector is AMP 49958-6 or equivalent.
Read Address
Write Address
Jumper (P2)
Jumper(P3)
1
6
2
7
3
8
4
9
5
10
0.15"
(3.8mm)
10.32 X 0.40
Ground Lug, Including
Nut and Lockwasher
OMX-CJC-C
Cold Junction
Compensation Circuit
Barrier Strips for
Field Analog Signal
I/O Termination. (8)
Address
Range
0-15 Stand alone
48-63 Expanded
32-47 Expanded
16-31 Expanded
0-15 Expanded
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