Yamaha SPX50D Service Manual page 9

SPX50D
SPX50D
Pin
No.
1
Name
I/O
MDAT15
1.0
MDAT14
1.0
MDAT13
1.0
MDAT12
1.0
MDAT11
1.0
MDAT10
1.0
MDAT9
1.0
MDAT8
1.0
M
DAT7
1
.0
MDAT6
1.0
MDAT5
1.0
MDAT4
1.0
MDAT3
MDAT2
MDAT1
MDATO
SI1
•
Data bus
Serial
data input terminal
Serial
data
output
terminal
Select internal
ACIA
synchroni-
zation
mode
Time-out output
terminal
Time-out output terminal
CD
counter
reset
CD
data
output
terminal
CD
data input terminal
Unconditionally outputs
the
15th
bit
of the Address
Shift Register
Three-state.
Memory
which needs
refreshing.
Three-state.
Connect
to
memory
OE.
Three-state.
Memory
read/write
signal.
Three-state.
DRAM
control
Three-state,
signal
.
Data bus
MOD
data input terminal
Initial
clear
Chip
enable
Master clock input
terminal
Nnput
for generating
SYNC
signals
internally
Terminal
for internal test.
To
enter
test
mode,
connect to
GND.
When
in
use,
VDD.
•
Address bus
Power
supply
5V