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IC801 LM78L05ACZ
INPUT
1
CURRENT
GENERATOR
REFERENCE
STARTING
ERROR
CIRCUIT
VOLTAGE
AMPLIFIER
U14 ZR36707TQC
CPU
RAM (8Kbytes)
Bit search module
3
DREQ0 to
/
DREQ2
DMA controller
3
DACK0 to
/
(8ch)
3
DACK2
/
EOP0 to
EOP2
Bus converter (32bits-16bits)
X0
X1
Clock control unit
RSTX
(Watchdog timer)
HSTX
6
INT0 to
/
Interrupt control
INT5
unit
NMIX
4
AN0 to AN3
/
AVcc
10-bit
AVss/AVRL
A/D converter
AVRH
(4 ch.)
ATGX
3
SI0 to SI2
/
3
SO0 to SO2
/
UART (3ch)
3
SC0 to SC2
/
Reload timer (3ch)
Port D,E,F
STRBIN
DVDSOS
A/V I/F port
STREQ/
DRVVLD
U9 TC74HCU04AF
SERIES
OUTPUT
PASS
2
1A
ELEMENT
1Y
SOA
PROTECTION
2A
2Y
3A
THERMAL
PROTECTION
3Y
GND
3
GND
Bus converter
(Harvard _ Princeton
16
/
D16 to D31
25
/
A00 to A24
RDX
2
/
Bus
WR0X,WR1X
RDY
controller
CLK
BRQ
BGRNTX
6
CS0X to CS5X
/
RAS0
RAS1
CS0L
DRAM
CS0H
controller
CS1L
CS1H
DW0X
DW1X
Port0 to port B
RAM(2Kbytes)
Flash memory
(510KB)
67
U11 NJM4580E
U12, U13 LS4580F
1
14
Vcc
A
OUT
2
13
6A
3
12
6Y
A
-IN
4
11
5Y
+IN
A
5
10
5Y
4A
V -
6
9
7
8
4Y
U2 ZR36768HQC
ADC data
U5 SST39V800FA
Memory Address
V +
8
1
2
7
B
OUT
A
B
3
6
B
-IN
4
5
B +IN
PLL data
EQ data
Interpolator
Equalizer
Threshold
Edge
flag/pos
Width
Measurer
PLL offset
DPLL
AGC
Frequency
Detector
PLL rate
X-Decoder
Address Buffer & Latches
CE#
OE#
Control Logic
WE#
68
IC501, IC502 LS4558N
1
8
A
+
-
7
2
B
+
-
3
6
4
5
Reconstructed
data
Viterbi
Algorithm
Threshold
Defect
Lock
MUX
Defect
Defect
Detector
EEPROM
Cell Array
Y-Decoder
I/O Buffers and Data Latches
DQ - DQ
15
0
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