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DIO24
PCI-DIO24
PMC-DIO24
PCI-DIO24-GD1
User Manual
Manual Revision: June 12, 2002
General Standards Corporation
8302A Whitesburg Drive
Huntsville, AL 35802
Phone: (256) 880-8787
Fax: (256) 880-8788
URL: www.generalstandards.com
E-mail: sales@generalstandards.com
E-mail: support@generalstandards.com

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Summary of Contents for General Standards Corporation PCI-DIO24PMC-DIO24PCI-DIO24-GD1

  • Page 1 DIO24 PCI-DIO24 PMC-DIO24 PCI-DIO24-GD1 User Manual Manual Revision: June 12, 2002 General Standards Corporation 8302A Whitesburg Drive Huntsville, AL 35802 Phone: (256) 880-8787 Fax: (256) 880-8788 URL: www.generalstandards.com E-mail: sales@generalstandards.com E-mail: support@generalstandards.com...
  • Page 2 DIO24, User Manual General Standards Corporation, Phone: (256) 880-8787...
  • Page 3 The information in this document is subject to change without notice. This document may be copied or reproduced provided it is in support of products from General Standards Corporation. For any other use, no part of this document may be copied or reproduced in any form or by any means without prior written consent of General Standards Corporation.
  • Page 4: Table Of Contents

    4.3.3. Board Status Register (BSR, 0x08, 32, RO)....................17 4.3.4. I/O Control Register (IOCR, 0x60, 32, RW)....................18 4.3.5. Discrete Data Output Register (DDOR, 0x64, 32, RW)................18 4.3.6. Discrete Data Input Register (DDIR, 0x68, 32, RO)..................18 General Standards Corporation, Phone: (256) 880-8787...
  • Page 5 5.3.2. Serial EEPROM Control, PCI Command Codes, User I/O Control, Init Control Register ......27 5.3.3. PCI Permanent Configuration ID Register ....................27 5.3.4. PCI Permanent Revision ID Register ......................27 5.4. DMA Registers ..............................28 5.5. Messaging Queue Registers ..........................28 Document History ........................29 General Standards Corporation, Phone: (256) 880-8787...
  • Page 6 Table 5 Register map of the GSC specific registers....................16 Table 6 Register map of the PCI Configuration Registers...................20 Table 7 Register map of the Local Configuration Registers..................24 Table 8 Register map of the Runtime Registers......................26 General Standards Corporation, Phone: (256) 880-8787...
  • Page 7: Introduction

    5V, 33 MHz PCI Specification 2.1. Although the PCI9080 supports DMA data transfers, DMA is not supported on this product. 1.4.2. External I/O Interface 1.4.2.1. RS485/422 Interface This interface provides for synchronous bus clock speeds up to 26MHz (104 Mbytes per sec). This is the standard interface option. General Standards Corporation, Phone: (256) 880-8787...
  • Page 8: Ordering Information

    Although the DIO24 provides extensive flexibility to accommodate many user applications, custom interfaces exist which may not conform to current DIO24 interface options. General Standards Corporation has worked with many customers to provide customized versions of the DIO24 and other GSC products. Please consult our sales department with your specifications to inquire about a custom application.
  • Page 9 DIO24, User Manual GLOBAL ENGINEERING DOCUMENTS 15 Inverness Way East Englewood, CO 80112 Phone: (800) 854-7179 http://global.ihs.com/ General Standards Corporation, Phone: (256) 880-8787...
  • Page 10: Physical Description

    Device ID and identifies the chip is a PCI9080. PCISVID This identifies the PCISID as being assigned by PLX Technologies. 0x10B5 PCISID This identifies the board as a member of the DIO24 product series. 0x2706 General Standards Corporation, Phone: (256) 880-8787...
  • Page 11: Pci-Dio24-Gd1

    Pin 49 Connector Pin 1 Pin 2 Table 3 External I/O connector P1 pins and descriptions. Pin No. Cable Signal Name Pin No. Cable Signal Name PORT A D0 + PORT B D4 - General Standards Corporation, Phone: (256) 880-8787...
  • Page 12: Jumpers

    The jumper block is located in the lower right corner of the board, as illustrated in Figure 2. A more detailed view is given in Figure 4 below. In the default factory configuration, jumpers are installed on all four horizontal jumper pairs. Figure 4 Jumper block J2. Jumper Block J2 General Standards Corporation, Phone: (256) 880-8787...
  • Page 13: Components

    As necessary the resistors may be also be replaced with alternate values. In the factory default configuration all seven resistor packs are installed and all are 150Ω. General Standards Corporation, Phone: (256) 880-8787...
  • Page 14: Cables

    D0 pins. This means that the Port A D0+ pin is connected to the three pins Port B D0+, Port C D0+ and Dedicated Input+. The same procedure applies to all remaining pins. General Standards Corporation, Phone: (256) 880-8787...
  • Page 15: Operation

    The lower 16-bits is the Vendor ID and identifies PLX Technology. The upper 16- 0x908010B5 bits is the Device ID and identifies the chip is a PCI9080. PCISVID This identifies the board as a product of General Standards Corporation. 0x10B5 PCISID This identifies the board as a member of the DIO24 product series.
  • Page 16: Registers

    * All other locations within the register block are reserved. 4.3.1. Firmware Revision Register (FRR, 0x00, 32, RO) This register gives revision and type information for the board and the firmware. Field 0x0B Default General Standards Corporation, Phone: (256) 880-8787...
  • Page 17: Board Control Register (Bcr, 0X04, 32, Rw)

    User Jumper 0: This reports the status of User Jumper 0, which is jumper block J2, pins 5-6. If a jumper is installed the value is one. The value is zero if a jumper is not installed. In the factory configuration the jumper is installed. 15-0 Reserved General Standards Corporation, Phone: (256) 880-8787...
  • Page 18: I/O Control Register (Iocr, 0X60, 32, Rw)

    This register reports the logic state of the signals on all 25 port bits. If a bit is configured as an input then the reported value is per the state induced by the attached device. If a bit is programmed for output then the reported value is the value programmed from the DDOR. General Standards Corporation, Phone: (256) 880-8787...
  • Page 19 Port C: This is the input value for the state of the Port C pins. 15-8 PORTB Port B: This is the input value for the state of the Port B pins. PORTA Port A: This is the input value for the state of the Port A pins. General Standards Corporation, Phone: (256) 880-8787...
  • Page 20: Dio24, User Manual

    PCI Master Enable. A ‘1’ allows the device to behave as a PCI bus master. Note: This bit must be set for the PCI 9080 to perform DMA cycles. Special Cycle. (Not Supported.) Memory Write/Invalidate. General Standards Corporation, Phone: (256) 880-8787...
  • Page 21: Pci Status Register

    2. PCI9080 detected a data parity error when it was the target of a write. 3. PCI9080 detected a data parity error when performing a master read. Writing a ‘1’ to this bit clears the bit. General Standards Corporation, Phone: (256) 880-8787...
  • Page 22: Pci Revision Id Register

    Default Size = 256 bytes. Note: Hardcoded to 0. D31:8 Memory Base Address. Memory base address for access to Local, Runtime, and DMA registers. Note: PCIBAR0 is Memory Mapped Base Address of PCI9080 Registers General Standards Corporation, Phone: (256) 880-8787...
  • Page 23: Pci Base Address Register For I/O Access To Local/Runtime/Dma Registers

    (Offset 0x2C, Reset 0x908010B5) D15:0 Subsystem Vendor ID – 0x10B5 = PLX Technology D31:16 Subsystem Device ID – 0x2606 = General Standards Corporation DIO24, 0x2400 = General Standards HPDI32 (used by PCI-DIO24-GD1). 5.1.13. PCI Interrupt Line Register (Offset 0x3C, Reset 0x00) D7:0 Interrupt Line Routing Value.
  • Page 24: Pci Min_Gnt Register

    Local Base Address (Remap) for PCI to Local Address Space 1 0x00000000 (Unused) 0xF8 0x178 Local Bus Region Descriptor (Space 1) for PCI to Local 0x00000000 Accesses (Unused) 5.2.1. Local Address Space 0 Range Register for PCI to Local Bus (PCI 0x00, Reset 0xFFFFF000) General Standards Corporation, Phone: (256) 880-8787...
  • Page 25: Mode/Arbitration Register

    D5:2 Memory Space 0 Internal Wait States A ‘0’ indicates no wait states required Memory Space 0 Ready Input Enable A ‘1’ indicates Local Ready input enabled. Memory Space 0 Bterm Input Enable (Unused) General Standards Corporation, Phone: (256) 880-8787...
  • Page 26: Runtime Registers

    Enable Local bus LSERR# on a PCI parity error (Unused) Generate PCI Bus SERR# Mailbox Interrupt Enable (Unused) D7:4 Reserved PCI Interrupt Enable PCI Doorbell Interrupt Enable (Unused) PCI Abort Interrupt Enable PCI Local Interrupt Enable General Standards Corporation, Phone: (256) 880-8787...
  • Page 27: Serial Eeprom Control, Pci Command Codes, User I/O Control, Init Control Register

    5.3.3. PCI Permanent Configuration ID Register (PCI 0x70, Reset 0x10B59080) ) D15:0 Permanent Vendor ID (0x10B5) D31:16 Permanent Device ID (0x9080) 5.3.4. PCI Permanent Revision ID Register (PCI 0x74) ) D7:0 Permanent Revision ID General Standards Corporation, Phone: (256) 880-8787...
  • Page 28: Dma Registers

    DIO24, User Manual 5.4. DMA Registers The DMA Registers are not used on the DIO24. 5.5. Messaging Queue Registers The Messaging Queue Registers are not used on the DIO24. General Standards Corporation, Phone: (256) 880-8787...
  • Page 29: Document History

    December 3, 2001 Initial Release December 11, 2001 Added Plug and Play information. February 13, 2002 Added system resource and loop back cable information. October 23, 2002 Added information about the new subsystem ID of 0x2606. General Standards Corporation, Phone: (256) 880-8787...

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