JVC KD-LX300 Service Manual page 28

KD-LX300/KD-LX100
QQ
3 7 63 1515 0
BR24C16F-X (IC703) : EEPROM
1. Pin layout
VCC WP
A0 A1
3. Block diagram
A0 1
Address
A1 2
decoder
A2 3
TE
L 13942296513
GND 4
High voltage osc circuit
BU4066BCFV-X (IC322) : Quad analog switch
1. Pin layout & Block diagram
VDD
14
www
1
I/O1
1-28
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2. Pin function
SCL SDA
Symbol I/O
A0,A1,A2
A2 GND
16kbit EEPROM allay
11bit
Slave Ward
11bit
Address resister
STOP
START
Control circuit
Power supply
voltage det.
C1 C4 I/O4
13 12 11
x ao
y
. i
2 3 4
O/I1 O/I2 I/O2
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8
VCC - Power supply.
GND - GND
I No use connect to GND.
SCL I Serial clock input.
SDA I/O Serial data I/O of slave and ward address.
WP I Write protect terminal.
8bit
Data
resister
Q Q
ACK
3 6 7 1 3
O/I4 O/I3
10 9
u163
.
5 6
C2 C3
2 9 9 4 2 8
Function
8 Vcc
7 WP
6 SCL
1 5 0 5 8 2 9
5 SDA
I/O3
8
m
co
7
Vss
9 9
9 4 2 8 9 9