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AVD-W6010
QQ
3 7 63 1515 0
NJM2116V
20
19
18
1
2
TE
L 13942296513
*CXL5520M
Vi (R-Y)
16
Clamp Circuit
Clamp Circuit
Auto Bias Circuit
www
.
1
V
DD
64
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14
17
16
15
3
4
5
6
7
NC
Vi (B-Y)
NC
15
14
13
CCD Register (1H)
CCD Register (1H)
Frequency time
(864 cycle)
VCO (13.5MHz)
x
ao
y
i
2
3
4
AB
NC
NC
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8
13
12
11
8
9
10
Q Q
3
6 7
1 3
Vo (B-Y)
Vo (R-Y)
NC
12
11
10
Output Circuit
CCD Register
(0H)
Output Circuit
CCD Register
(0H)
Timing Circuit
Phase
Sand Castle
Comparator
Pulse Detector
u163
.
5
6
7
SAND VCOIN
NC
2 9
9 4
2 8
1 5
0 5
8
2 9
9 4
NC
9
m
co
8
GND
9 9
2 8
9 9
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