Skyworth 42E68 Instruction Manual page 40

TAS5707
SLOS556A – NOVEMBER 2008 – REVISED APRIL 2009
48-TERMINAL, HTQFP PACKAGE (TOP VIEW)
PVDD_A
PVDD_A
GVDD_OUT
SSTIMER
OC_ADJ
PLL_FLTM
PLL_FLTP
VR_ANA
PIN
NAME NO.
AGND 30
AVDD 13
AVSS 9
BST_A 4
BST_B 43
BST_C 42
BST_D 33
DVDD 27
DVSSO 17
DVSS 28
GND 29
GVDD_OUT 5, 32
LRCLK 20
MCLK 15
(1) TYPE: A = analog; D = 3.3-V digital; P = power/ground/decoupling; I = input; O = output
(2) All pullups are weak pullups and all pulldowns are weak pulldowns. The pullups and pulldowns are included to assure proper input logic
levels if the pins are left unconnected (pullups
6 Submit Documentation Feedback
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48 47 46 45 44 43 42 41 40 39 38 37
OUT_A
1
2
3
BST_A
4
5
6
7
NC
8
AVSS
9
10
11
12
13 14 15 16 17 18 19 20 21 22 23 24
TYPE 5-V TERMINATION
(1)
TOLERANT
P
P
P
P
P
P
P
P
P
P
P
P
DI 5-V Pulldown
DI 5-V Pulldown
logic 1 input; pulldowns
Product Folder Link(s):
PHP Package
(Top View)
TAS5707
PIN FUNCTIONS
(2)
Analog ground for power stage
3.3-V analog power supply
Analog 3.3-V supply ground
High-side bootstrap supply for half-bridge A
High-side bootstrap supply for half-bridge B
High-side bootstrap supply for half-bridge C
High-side bootstrap supply for half-bridge D
3.3-V digital power supply
Oscillator ground
Digital ground
Analog ground for power stage
Gate drive internal regulator output
Input serial audio data left/right clock (sample rate clock)
Master clock input
logic 0 input).
TAS5707
OUT_D
36
PVDD_D
35
PVDD_D
34
BST_D
33
GVDD_OUT
32
VREG
31
30 AGND
29 GND
28 DVSS
27 DVDD
26
STEST
25
RESET
P0075-01
DESCRIPTION
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