Sharp LC-32RD2 Service Manual page 84

LC-32RD2E/S/RU, LC-37RD2E/S/RU
Pin No.
8
7
10
13, 22
20, 21
14
19
18
17
15, 16
12
11
3, 55, 71, 87
4, 56, 72, 88
33, 45
26, 38, 50
24
23, 25
Pin Name I/O
VSYNC I Vsync Input.
HSYNC I Hsync Input.
CLKIN I Clock Input.
TEST1, TEST5 O Test Pins.
TEST3, TEST4 I Test Pins, must be L for normal operation.
TEST2 I Test Pins, must be H for normal operation.
/PDWN I H: Normal operation. L: Power down (all outputs are Hi-Z)
6/8 I 6bit/8bit color select. H: 6bit (TDx +/- are GND), L: 8bit
OE I Output enable. H: Output enable, L: Output disable (all outputs are Hi-Z)
Pixel data Mode
MODE1
MODE1, MODE0 I
RS I LVDS swing range select. H: Normal range, L: Reduced range.
R/F I Input Clock Triggering Edge Select. H: Rising edge, L: Falling edge
VCC — Power Supply Pins for TTL inputs, output and digital circuitry.
GND — Ground pins for TTL inputs, output and digital circuitry.
LVDS VCC — Power Supply Pins for LVDS Outputs.
LVDS GND — Ground pins for LVDS Outputs.
PLL VCC — Power Supply for PLL circuitry.
PLL GND — Ground pins for PLL circuitry.
MODE0 MODE
L L Dual Link (Dual-in/Dual-out)
L H Single Link (Dual-in/Single-out)
H H Single Link (Single-in/Single-out)
5 – 13
Pin Function