Pioneer BDP-LX55 Service Manual page 67

5
SIL 9136
DATAOUT[19:0] 14
DATA
DATAOUT0---DATAOUT9
DATAOUT10---DATAOUT19
CLK, DATA
&
CONTROLS
SHOULD BE
LENGTH
MATCHED.
HSOUT1 14
VSOUT1 14
FDOUT1 14
CLKOUT1 14
N
ER
1V8_KYOTO_G2_DDR2
5
6
MAIN BOARD ASSY (12/15)
A
12/15
(BDP-LX55/YXCN5, BDP-LX55/VXCN5 : 08-BDLX55-MA0/Y)
(BDP-LX55/FWLXCN
(BDP-53FD/UCXCN
Signal
Cb0/Cr0 --- Cb9/Cr9
Y0--Y9
Single VIA
to GND
plane
closest to
caps
3.3V
R77 R77
16 14 MCU_SCL
16 14 MCU_SDA
4.7K 4.7K
16 QDEO__REST
1V8_FOR_Xtal 1V8_KYOTO_G2_DDR2
1V8_FOR_Xtal
FB13 FB13
C145
220/500mA 220/500mA
U14C U14C
88DE2750 88DE2750
6
7
C155,C156 & R62
should be placed
C156
close to Y1
27pF/50V/NP0
T13
XTAL1 TCK
Y300 R98 R98
TMS
20MHz/20PPM
1M 1M
TRST
TDI
T14
XTAL2 TDO
C155
27pF/50V/NP0
R95 R95 100 100 C9
SCL TEST
B9
R97 R97 100 100
SDA ATEST
A9
R117 R117 100 100
RESETZ
C374 C374 A10
EXT_IN
10P/50V/NP0 10P/50V/NP0
U14D U14D
88DE2750 88DE2750
3V3_KYOTO_G2
ALL POWER/GND BALLS SHOULD GO TO
POWER/GND PLANES THROUGH VIAS ONLY
(NO TRACKS)
BDP-LX55
7
8
: 08-BDLX55-MA0/F)
: 08-BDLX55-MA0/U)
3.3V
R92
R91 R91 R93 R93
4.7K 4.7K
4.7K 4.7K
4.7K
B10
C10
D10
BERG-PIN1 BERG-PIN1
A11
B11
BERG-PIN2 BERG-PIN2
C8
P13
TEST=LOW ATEST & TDO
FOR NORMAL
OPERATION
ON BERG
PINS FOR
DEBUG
1V_KYOTO_G2 1V8_KYOTO_G2_DDR2
A
8
A
B
C
D
E
F
12/15
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