Sony ICF-SW07 Service Manual page 35

IC501 µPD753017AGK-717-BE9 (MAIN SYSTEM CONTROL, LCD DRIVE)
Pin No. Pin name
1 – 12 S12 – 23
13 – 16 –––––
17 XTAL-CTL
18 BEEP-CTL
19 IF-POWER
20 AF-POWER
21 COM0
22 COM1
23 COM2
24 COM3
25 BIAS
26 VLC0
27 VLC1
28 VLC2
29 SD
30 TUNE
31 –––––
32 HOLD
33 GND
34 MUTE
35 SET
36 REQ-SUB
37 REQ-DTS
38 VDET-1
39 SCK
40 SO
41 SI
42 ACK
43 VDET2
44 UNLOCK
45 CARD
46 –––––
47 CS1
48 BEEP
49 CS0
50 KS0
51 KS1
52 KS2
53 KS3
54 VDD
55 XT1
56 XT2
57 IC
58 X1
59 X2
60 – 67 KR0 – KR7
68 RESET
69 – 80 S0 – S11
I/O
O LCD segment signal output.
– Not used (OPEN).
O Level shift control output for system clock.
O Beep signal control ouptut.
O IF B+ ON/OFF control output.
O Power amp ON/OFF control output.
O LCD common signal output.
O LCD common signal output.
O LCD common signal output.
O LCD common signal output.
O Bias output for LCD.
– LCD drive power supply.
– LCD drive power supply.
– LCD drive power supply.
I SD signal input terminal.
I TUNE signal input terminal.
– Connect to VDD.
I Hold switch input.
– Ground terminal.
O Mute signal output.
– Not used (OPEN).
O Request signal output for sub system control.
O DTS request signal output for PLL.
I Power voltage detect input.
I Sub clock signal input.
O Data signal output.
I Data signal input.
I Clock signal input from PLL.
I Power voltage detect input.
I PLL unlock detect input.
– Connect to ground.
– Not used (OPEN).
O Chip select output for ROM.
O Beep signal output.
O Chip select signal output.
I Key input.
I Key input.
I Key input.
I Key input.
– Power supply terminal.
I Sub clock input (32.768kHz).
O Sub clock output (32.768kHz).
– Connect to VDD.
I Main system clock input (4MHz).
O Main system clock output (4MHz).
I Key input terminal.
I System reset input. "L" : Reset
O LCD segment signal output.
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Description