1
Pin Function
No. Pin Name I/O
A
−
1
DACVCC
−
2
DACGND
−
3
N/C
−
4
N/C
−
5
DACGNDR
−
6
DACVCCR
7
AnRPr
O
8
COMP
I
9
RSET
I
−
10
DACGNDG
−
B
11
DACVCCG
12
AnGY
O
−
13
DACGNDB
−
14
DACVCCB
15
AnBPb
O
−
16
GND
−
17
VCC
18
RSVDL
I
19
RSVDD
O
20
RSVDD
O
−
21
OVCC
C
−
22
PGND2
−
23
PVCC2
24
PLLIN
I/O PLL filter input
25
PLLOUT
I/O PLL filter output
26
O
MCCLKOUT
27
MCCLKIN
I
−
28
OGND
29
SPDIF
O
30
SDO
O
31
WS
O
D
32
SCK
O
33
HSYNC
O
34
VSYNC
O
35
DE
O
36
Q23
O
37
Q22
O
38
Q21
O
39
Q20
O
−
40
VCC
−
41
GND
E
42
Q19
O
43
Q18
O
44
Q17
O
−
45
OGND
46
ODCK
O
−
47
OVCC
48
Q16
O
49
Q15
O
50
Q14
O
F
154
1
2
Pin Function
DAC power supply (3.3V)
DAC ground
No connection
No connection
DAC Red ground
DAC Red power supply (3.3V)
Red, Pr output of analog video
For reference amp. correction of DAC inside
Full scale adjustment resistor input
DAC Green ground
DAC Green power supply (3.3V)
Green, Y output of analog video
DAC Blue ground
DAC Blue power supply (3.3V)
Blue, Pb output of analog video
Digital ground
Digital power supply (3.3V)
Reserved
Fixed to low.
Reserved No connection
Reserved No connection
Output bus power supply (3.3V)
Audio PLL ground
Audio PLL power supply (3.3V)
Audio master clock output
Reference audio master clock input
Output bus ground
SPDIF audio output
I2S serial data output
I2S word selecting output
I2S serial clock output
Horizontal sync. control signal output
Vertical sync. control signal output
Data enable
24-bit output pixel data bus
24-bit output pixel data bus
24-bit output pixel data bus
24-bit output pixel data bus
Digital power supply (3.3V)
Digital ground
24-bit output pixel data bus
24-bit output pixel data bus
24-bit output pixel data bus
Output bus ground
Data clock output
Output bus power supply (3.3V)
24-bit output pixel data bus
24-bit output pixel data bus
24-bit output pixel data bus
2
3
No. Pin Name I/O
51
Q13
O
52
Q12
O
53
Q11
O
54
Q10
O
55
Q9
O
−
56
OVCC
−
57
OGND
58
Q8
O
59
Q7
O
60
Q6
O
61
Q5
O
62
Q4
O
63
Q3
O
−
64
VCC
−
65
GND
−
66
OGND
−
67
OVCC
68
Q2
O
69
Q1
O
70
Q0
O
71
INT
O
72
RESET#
I
73
RSVDL
I
74
CSCL
I
75
CSDA
I/O Configuration I2C data
76
DSDA
I/O DDC I2C data
77
DSCL
I
−
78
OGND
−
79
PGND1
−
80
PVCC1
81
EXT_RES
I
−
82
AVCC
83
RXC-
I
84
RXC+
I
−
85
AGND
86
RX0-
I
87
RX0+
I
−
88
AGND
−
89
AVCC
−
90
AGND
91
RX1-
I
92
RX1+
I
−
93
AVCC
−
94
AGND
−
95
AVCC
96
RX2-
I
97
RX2+
I
−
98
AGND
−
99
GND
−
100 VCC
PDP-R04E
3
4
Pin Function
24-bit output pixel data bus
24-bit output pixel data bus
24-bit output pixel data bus
24-bit output pixel data bus
24-bit output pixel data bus
Output bus power supply (3.3V)
Output bus ground
24-bit output pixel data bus
24-bit output pixel data bus
24-bit output pixel data bus
24-bit output pixel data bus
24-bit output pixel data bus
24-bit output pixel data bus
Digital power supply (3.3V)
Digital ground
Output bus ground
Output bus power supply (3.3V)
24-bit output pixel data bus
24-bit output pixel data bus
24-bit output pixel data bus
Interruption output
Reset Activ low.
Reserved
Fixed to low.
Configuration I2C clock
DDC I2C clock
Output bus ground
PLL ground
PLL power supply (3.3V)
Input impedance adjustment
Analog power supply (3.3V)
TMDS data input
TMDS data input
Analog ground
TMDS data input
TMDS data input
Analog ground
Analog power supply (3.3V)
Analog ground
TMDS data input
TMDS data input
Analog power supply (3.3V)
Analog ground
Analog power supply (3.3V)
TMDS data input
TMDS data input
Analog ground
Digital ground
Digital power supply (3.3V)
4