Pin No.
Pin Name
117
GND
118
VDDINT
119
GND
120
VDDINT
121
XRESET
122
XSPIDS
123
GND
124
VDDINT
125
SPICLK
126
MISO
127
MOSI
128
GND
129
VDDINT
130
VDDEXT
131
AVDD
132
AVSS
133
GND
134
CLKOUT
135
XEMU
136
TDO
137
TDI
138
CTRST
139
TCK
140
TMS
141
GND
142
CLKIN
143
XTAL
144
VDDEXT
I/O
—
Ground
—
Power supply terminal (+1.2 V)
—
Ground
—
Power supply terminal (+1.2 V)
I
System reset signal input from main system controller.
I
Serial data latch pulse signal input from main system controller.
—
Ground
—
Power supply terminal (+1.2 V)
I/O
Serial data transfer clock signal input/output with flash memory.
When DSP is master: Serial data input from flash memory.
I/O
When DSP is slave: Serial data output for main system controller.
When DSP is master: Serial data output for flash memory.
I/O
When DSP is slave: Serial data input from main system controller.
—
Ground
—
Power supply terminal (+1.2 V)
—
Power supply terminal (+3.3 V)
—
Power supply terminal (+1.2 V)
—
Ground
—
Ground
—
Not used. (Open)
—
Not used. (Open)
—
Not used. (Open)
—
Not used. (Fixed at L in this set)
—
Not used. (Fixed at L in this set)
—
Not used. (Fixed at L in this set)
—
Not used. (Fixed at L in this set)
—
Ground
I
System clock input (25 MHz)
O
System clock output (25 MHz)
—
Power supply terminal (+3.3 V)
Pin Description
STR-DG910
67