Sony MDS-DRE1 Service Manual page 62

Pin No. Pin Name
57 SDI0
58 DSO
59 DSI/OS0
60 DSCK/OS1
61 DR
62 to 65 MD7 to MD4
66 GNDD
67 to 69 MD3 to MD1
70 VCCD
71 MD0
72 GNDD
73 GPIO3
74 GPIO2
75 GPIO1
76 GPIO0
77 MRD
78 MWR
79 MRAS
80 MCAS
I/O
I
Playback serial data input from the CXD2537R (IC601)
O
Debug serial data output terminal Not used (pull up)
I
Debug serial data input terminal Not used (fixed at "L")
I/O
Debug serial clock signal in/out terminal Not used (fixed at "L")
I
Debug request signal input terminal Not used (fixed at "H")
I/O
Two-way data bus with the external memory Not used (open)
— Ground terminal (for EMI data bus and GPIO output buffer)
I/O
Two-way data bus with the D-RAM (IC702)
—
Power supply terminal (+5V) (for EMI data bus and GPIO output buffer)
I/O
Two-way data bus with the D-RAM (IC702)
—
Ground terminal (for EMI data bus and GPIO output buffer)
I
ATRAC block 11.6 msec timing signal input from the CXD2537R (IC601)
O
Latch control signal output of the BCK and LRCK signals
I ATRAC interface data EXE signal input from the CXD2537R (IC601)
Playback direction control signal input from the system controller (IC101)
I
"L": RVS, "H": FWD
O
Data read strobe signal output of the external memory "L" active Not used (open)
O
Data write strobe signal output to the D-RAM (IC702) "L" active
O
Row address strobe signal output to the D-RAM (IC702) "L" active
O Column address strobe signal output to the D-RAM (IC702) "L" active
Function
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