24Lc21A/P - Hitachi 36SDX88B Service Manual

Serial Data (SDA). The SDA pin is bi-directional and is used to
BLOCK DIAGRAM
transfer data in or out of the memory. It is an open drain output
that may be wire-OR'ed with other open drain or open collector
signals on the bus. A resistor must be connected from the SDA
bus line to Vcc to act as pull up (Figure I).
Chip Enable (EO-EZ). For the M24Cl6, there is no chip enable
input. Only one M24C16 can be addressing on the same l% bus.
The EO, El and E2 pins are Not Connected.
These EO, El and E2 inputs may be driven dynamicaly or tied to
Vcc or Vss to establish the Device Select code.
Write Control (WC). A hardware Write Control pin (WC) is provided
on pin 7 of the memory. This feature is useful to protect the entire
contents of the memory from any erroneous erase/write cycle. The
Write Control signal is used to enable (wC=V,,) or disable
1 1 F-HY GENEliATOR
I/O
MEMORY
CONTROL- CONTROL-
I nmr
-1
-b -
u
SDA SCL
VCLK
VCC+
vSS+
AIV
XDEC+
L
L
PAGE LATCHES
I
+
) SENSE AMP
Ri CONTROL
(?%VIH) write instruction to the entire memory area. When
B.
TABLE t 1. - . PIN FUNCTION TABLE
. . . . . _ . .
unconnected, the WC input is internally read as VIL and write
operations are allowed. When m=l, Device Select and Address
Name Function
bytes are acknowledged, Data bytes are not acknowledged.
VSS
Ground
.
SDA
Serial Address/Data l/O
4.2 Memory
24LC21AIP
SCL Serial Clock (Bidirectional Mode)
VCLK Serial Clock (Transmit-Only Mode)
VCC +2.5V to 5.5V Power Supply
1. DESCRIPTION
I
NC No Connection
I
The Microchip Technology Inc. 24LC21A is a 128 x 8-
bit dual-mode Electrically Erasable PROM. This device
is designed for use in applications requiring storage
and serial transmission of configuration and control
information. Two modes of operation have been
implemented: Transmit-Only Mode and Bi-directional
Mode. Upon power-up, the device will be in the Transmit-
Only Mode, sending a serial bit stream of the memory
array form OOh to 7Fh, clocked by the VCLK pin. A valid
high to low transition on the SCL pin will cause the
device to enter the transition mode, and look for a valid
control byte on the 12C bus. If it detects a valid control
byte from the master, it will switch into Bi-directional
Mode, with byte selectable read/write capability of the
memory array using SCL. If no control byte is received,
the device will revert to the Transmit-Only Mode after
it receives 128 consecutive VCLK pulses while the SCL
pin is idle. The 24LC21A is available in a standard 8-
pin PDlP and SOlC package in both commercial and
industrial temperature ranges.
PIN DESCRIPTIONS
1. SDA
This pin is used to transfer addresses and data into and
out of the device, when the device is in the Bi-directional
Mode. In the Transmit-Only Mode, which only allows
data to be read from the device, data is also transferred
on the SDA pin. This pin is an open drain terminal,
therefore the SDA bus requires a pullup resistor to Vcc
(typical 10 KS2 for 100 kHz, 1 K&I for 400 kHz).
For normal data transfer in the Bidirectional Mode,
SDA is allowed to change only during SCL low. Changes
during SCL high are reserved for indicating the START
and STOP conditions.
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