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4.1.5 RAM
The standard LAl20 has 2K bytes of RAM. This RAM is logically in two parts, one addressable from
4000H-4FFFH and the other from SOOOH-SFFFH. RAM addresses are not fully decoded, so that
each IK portion of the RAM has "ghosts" at IK intervals in its address range. To be exact, address
bits All and AIO are not significant. Thus, locations 4000H, 4400H, 4800H, and 4COOH are identical.
By convention, LAl20 firmware defines RAM to be the contiguous 2K space from 4COOH-S3FFH. At
no time does the firmware rely on the ghosting effect, nor is it tested by RAM diagnostics. The RAM
address map is shown in Figure 4-3.
4.1.6 Keyboard
-----4000H-----
(GHOST)
-----4400H-----
(GHOST)
-----4800H-----
(GHOST)
-----4COOH-----
LOW 1K OF RAM
-----5000H-----
HIGH 1 K OF RAM
-----5400H-----
(GHOST)
-----5800H-----
(GHOST)
-----5COOH-----
(GHOST)
-----6000H-----
MA·4704
Figure 4-3
RAM Address Map
In the LA120, the microprocessor directly reads the keyboard switch array, filters the data, and gener-
ates the proper codes or other actions in firmware, thereby giving the programmer complete freedom
in specifying keyboard functionality.
4.1.6.1
Keyboard Addressing (Table 4-4) - The keyboard switch array is read using memory-mapped
I/0. All reads in the address range 3000H-3FFFH will select the keyboard switch array.
Keyboard addresses are only partially decoded: in particular, address bits AS-All are ignored. The
keyboard switch array appears to the microprocessor as 16 bytes of bit-encoded data - one bit per
switch. Switches are grouped into two banks: the first bank is selected by A3, the second by A4. If both
are selected, the microprocessor will read the logical OR of the two. By convention, LAl20·firmware
uses addresses 3008H-3017H to access the keyboard which relates, in hardware, to a direction of scan
from BREAK toward ESCAPE. The direction was originally arbitrary but is now crucial to proper
operation of the receive only control panel in the LAI20-RA.
Bits that read as O's are open, undepressed keys, while 1 's are keys that are closed. In both banks,
data bits DO-D4 contain the state of regularly decoded switches; bits DS and D6 are constant 1 'so In
the first bank only, bit D7 contains data for separately decoded switches; in the second bank, D7
is always O.
4-S
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