Q Q - Sony STR-DB830 Service Manual

QQ
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Pin No. Pin Name I/O
91 V 0 —
SS
92 – 94 EA13 – EA15 O
95 EA16 O
96 TSTA I
97 PLDIVF I
98 PLDIVB O
99 CLKI I
100 CLKO O
101 V 1 —
SS
102 V 0 —
DD
103 AV —
SS
104 AV —
DD
105 PLLCK I/O
106 XPLLEN I
107 TST I
108 LRCT I
109 LROUT O
110 BKOUT O
111 V 2 —
SS
112 V 1 —
DD
113 BCK0 I
114 BCK1 I
TE
L 13942296513
115 LRCK0 I
116 LRCK1 I
117 – 120 SIA – SID I
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Ground
External RAM address output
Not used
Test data input "L" = normal "H" = test (Connecting to ground)
PLL input frequency select "L" = 256Fs "H" = 128Fs (Connecting to ground)
PLL output frequency select "L" = 768Fs "H" = 1024Fs (Connecting to ground)
Master clock input
Master clock output (Not used)
Ground
+3.3V
Ground for PLL cell
VDD for PLL cell
PLL output/test clock input
PLL cell oscillation enable "L" oscillation enable "H" oscillation stop (Connecting to ground)
Test data input "L" = normal "H" = test (Connecting to ground)
Frequency counter input (Connecting to ground)
LRCK0 divider output
BCK0 divider output
Ground
+3.3V
BCK input
BCK input
LRCK input
LRCK input
Serial data input
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Description

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