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Sharp PC-1500 Service Manual page 10

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(20)
NMI
Non·maskable
interrupt. A high NMI
signal
denotes an
interrupt
request,
to
which
the
MPU
responds
unconditionally
and
the
control
mows to
start the
interrupt
pro~ssing
rout.
i nc after
the
contents of
the
memory
address
FFFC
is
moved into the
high
order byte
of
the program
counter
and
the contents of the memory
address
FFFD
into
the low order byte
of
the
program
counter.
(21)
Ml
Maskable
interrupt. A high
on
this signal
makes
interrupt
request
when interrupt
enable
is
set.
The MPU
responds
uncond.
i t
ionally
to this request.
Control moves
to start
the
Interrupt
pr~ssing
routine
after the contents
of
the memory
address FFF8 is
mo,·ed into the
high
order
byte of the
program
counter,
the
contents of
the
memory address
FF
F9 are
moved into the
low
order byte of
the program
counter.
(221 OD
011tp11t diS<lble.
When
the OD
~ignal
i$
active the data bus is
in
the
output
mode.
"'
...
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N
0
-
-
-
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0
t-.
(I)
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CO
CN
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Q
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Q
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Q
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57
56 55
54 58
52 51 50
49
48 47
46 45
44 43
42 41 40
39
R/W
58
38
D7
P/6
59
87
D6
PV 60
86
D5
PU
61
85
04
f!os
62
84
08
Xi,0
63
83
02
XI,
I 64
82
I)
I
WAIT
65
SI
DO
IN7
66
30
ME
I
INS
67
LH5
801
29
M
EO
INS
68
28
OD
IN4 69
27
HO
I
N3 10
26
111
I
N2
71
25
11
2
IN I
72
24
118
INO
73
28
H4
74
22
HS
75
0
21
H6
76
20
H7
2
3 4
5
6
7
8
9
10
11
12 IS
14 15 16 17
18 19
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8
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