Display Unit(Ldm-3000); Diagrams; Block Diagrams - Sony KLV-MR30M1 Service Manual

4-1. BLOCK DIAGRAMS

4-1-1. DISPLAY UNIT(LDM-3000)

CN3102
SPDIF- A13 1
SPDIF+ A11 2
SIRCS- A10 13
D3111-D3114
SIRCS+ A8 14
OVER VOLTAGE
UART_O+ A6 10
PROTECTOR
UART_O- A4 11
TO
UART_I+ A3 6
MEDIA RECEIVER
UART_I- A1 7
UNIT
12
STATUS
STATUS B3 11
P SW
POWER ON B5 TO 2/2
IC3109
RESET B11 1 1A
TXD 1 B9 8 3A
RXD 1 B8 11 4A
MD 1 B6 4 2A
JIG A7 5 , , 6 12 13
CABLE DET B7
IC3108
3
Q3102 VOLTAGE
DET
RES
5
CN3101
DATA 2- 1
DATA 2+ 2
DDC SCL 6
DDC SDA 7
DATA 1- 9
D3104-3107
DATA 1+ 10 OVER VOLTAGE
TO
PROTECTOR
+5V POWER 14
MEDIA RECEIVER
UNIT HOT PLUG DET 16
DATA 0- 17
DATA 0+ 18
CLOCK+ 23
CLOCK- 24
IC3106
EEPROM
Q3112
+3.3V +3.3V
TO
IC3105,
3106,
3107
Q3113
TMDS ON
8
TO 2/2
SECTION 4

DIAGRAMS

Q3101
5V-4
3.2V
REG
IC3101
LVD RXTX
SPDIF
3 6 TO 2/2
SIRCS
15
IC3107
TXD 0 TMDS RECEIVER
9 5 TO 2/2
RXD 0
QE16-23
5
DE RE 4
Q3111
PD LVDS
RES
1B 2 7 TO 2/2
TXD1
3B 9
RXD1
4B 10
MD1
2B 3
,
1
DET
7
5V-4
Q3109,3110
3.3V
81 RX2-
80 RX2+
Q3104
2 IIC 3
5V 3.3V
7 BUFF 6
IC3102
84 RX1-
83 RX1+
87 RX0-
86 RX0+
89 RXC+
90 RXC-
IC3105
12 96 PROM SDA
SDA2
14
SDA 5 13
15
11 93 DDC SDA
1 95 PROM SCL
SCL2
5
SCL 6 3
2
4 92 DDC SCL
SEL0
A 10
SEL1
B 9
Q3108
9 TO 2/2
WP
WC 7 10 TO 2/2
IC3401
LCD DRIVER
174,175
ITQE
30-37 178-182,
RI0-RI7
16-23
184
185-188,
ITQE
QE8-15 20-27 GI0-GI7
191-194
8-15
195-199,
ITQE
QE0-7 10-17 BI0-BI7
202-204
0-7
11 CLK33
X3401
33MHz 14 OSC33
X3402
100MHz
121 CLKI00
OSC
ODCK 44
IC3301 PLL
IC3302 166 CLKTMDS
2 4
12 VCO VCO
3 30 CLK
IN OUT
1
VCO
10 SEL 2 25 CLK SEL
INH
PFD FIN 4
6 23 APLL
Q3303 OUT A
PFD FIN
9 5 21 BPLL
INH B
PLL CLK ON
15
TO 2/2
CLR
TO 2/2 2 2 CLX
MUTE
5 ICBLK
SCL1
TO 2/2 14 8 ICSCL
SDA1
9 ICSDA
HSI
HSYNC 48 167 ITHSYNC
VSI(VSO V6)
VSYNC 47 168 ITVSYNC
DEI
DE 46 169 ITDE
CTL3
RSVD 42 170 ITCTL3
CTL2
CTL2 41 171 ITCTL2
FIELD BOLT
172 ITCTL1
SCDT
SCDT 8 173 ITSCDT
PD TMDS
PD 2
PD
12 13 4
TO 2/2
IC3501
LDVS TRANSMITTER
TD0,1
2,3, TA0-5
87-92,
O6RED
RO0-7 50-52,
98,99
0-7
54-56
TD2,3,
TA6,
4,
TB0-4
75-78, 6-8,
O6GRN GO0-7
80-83 10-12,
0-7
TTL PARALLEL
14
TD4,5,
TB5,6,
LVDS
15,16 TC0-3
56,58,
OBLU
BO0-7 18-20,
62-66
0-7
22-24
TC5
VSO
6VS 53 28
TC4
HSO
6HS 55 27
TC6
DEO
DE 54 30
CLKO CLK IN
OCLK 51 31
PD
32 PDWN
IC3402
DRAM
2,3,
5,6,
141, 8,9,
DQ 143-146, 11,12, D
DQ1-16
1-16 149-153, 39,40, 0-15
156-161 42,43,
45,46,
48,49
100-104,
A 19-24, A
108-113,
A0-11
0-11 27-32 0-11
115
CLK RAM 127 35 CLK
OCKE 129 34 CKE
OWE 135 15 WE
ORAS 132 17 RAS
OCAS 133 16 CAS
OLDQM 136 14 LDQM
OUDQM 134 36 UDQM
OCS 128 18 CS
P(1/2)
( PANEL CPU)
CN3504
TA-
48 18 TA-
TA+
47 17 TA+
TB-
46 16 TB-
TB+
45 15 TB+
TC- TO
42 14 TC-
LCD
TC+
TO 41 13 TC+ UNIT
TCLK-
40 12 TCLK-
TCLK+
39 11 TCLK+
TD-
38 10 TD-
TD+
37 9 TD+
PLL
KLV-MR30M1 (CH) 4-1