Samsung STR-DE1075 Service Manual page 51

• DIGITAL BOARD IC1501 CDX9617R (AUDIO DSP1)
Pin No. Pin Name
VSS
1
2 XRST
3 EXTIN
4 FS2
5 VDDI
6 FS1
7 PLOCK
8 VSS
9 MCLK1
10 VDDI
11 VSS
12 MCLK2
13 MS
14 SCKOUT
LRCKI1
15
VDDE
16
17 BCKI1
18 SDI1
19 LRCKO
20 BCKO
VSS
21
22 KFSIO
SDO1 to SDO4
23 to 26
27 SPDIF
28 LRCKI2
29 BCKI2
SDI2
30
VSS
31
HACN
32
33 HDIN
HCLK
34
HDOUT
35
HCS
36
37 SDCLK
CLKEN
38
RAS
39
VDDI
40
VSS
41
CAS
42
DQM/OE0
43
CS0
44
WE0
45
VDDE
46
WMD1
47
VSS
48
I/O
—
Ground terminal
I Reset signal input from the system controller (IC1703)
I
Master clock input terminal Not used (fixed at "L")
I
Sampling frequency select signal input terminal Not used (fixed at "L")
—
Power supply terminal (+2.5V)
I Sampling frequency select signal input terminal Not used (fixed at "L")
O
Internal PLL lock signal output terminal Not used (open)
—
Ground terminal
I
Systen clock input terminal (13.5MHz)
— Power supply terminal (+2.5V)
—
Ground terminal
O
Systen clock output terminal (13.5MHz)
I
Master/slave active select terminal "L": internal clock, "H": external clock
O Internal system clock output terminal Not used (open)
I
L/R sampling clock signal input from the audio interface receiver (IC1408)
—
Power supply terminal (+3.3V)
I
Bit clock signal input from the audio interface receiver (IC1408)
I Audio data input from the A/D converter (IC1503)
O
L/R sampling clock signal output to the audio DSP2 (IC1601)
O
Bit clock signal output to the audio DSP2 (IC1601)
—
Ground terminal
I/O Audio clock signal (384fs/256fs) in/out terminal
O
Audio serial data output to the audio DSP2 (IC1601)
O
S/PDIF output terminal Not used (open)
I
L/R sampling clock signal input from the audio interface receiver (IC1408)
I Bit clock signal input from the audio interface receiver (IC1408)
I
Audio serial data input from the audio interface receiver (IC1408)
—
Ground terminal
O
Host acknowledge signal output to the system controller (IC1703)
I Host serial data input from the system contrller (IC1703)
I
Host clock signal input from the system contrller (IC1703)
O
Host serial data output to the system contrller (IC1703)
I
Host chip select input from the system contrller (IC1703)
O SD-RAM clock output terminal Not used (open)
O
SD-RAM clock enable output terminal Not used (open)
O
Row address strobe signal output terminal Not used (open)
—
Power supply terminal (+2.5V)
—
Ground terminal
O
Column address strobe signal output terminal Not used (open)
O
Mask data output terminal
O
Chip select isignal output to the S-RAM (IC1502)
O
Write enable signal output to the S-RAM (IC1502)
—
Power supply terminal (+3.3V)
I
External memory wait mode setting terminal (fixed at "H")
—
Ground terminal
Description
STR-DE1075
51