Sony HCD-F150 Service Manual page 51

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Pin Name
Pin No.
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
TE
58
L 13942296513
59
60
61
62
63
64
• Abbreviation
EFM : Eight to Fourteen Modulation
APC : Auto Power Control
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I/O
SLOF I Sled servo off control input
CV– I CLV error signal is input from the digital signal processor
CV+ I CLV error signal is input from the digital signal processor
RFSM O RF output
Works together with the RFSM pin to set the RF gain and the 3T compensation constant for
RFS– I
the EFM signal
SLI (Slice Level Control) is output to control a data slice level of the RF waveform by the
SLC O
digital signal processor
SLI I Input pin for controlling a data slice level by the digital signal processor
DGND — Digital Ground
FSC O Focus search smoothing capacitor output
TBC I TBC (Tracking Balance Control) sets a EF balance variable range
NC — Not used
DEF O Defect detection output for a disc
CLK I Reference clock input The 4.23 MHz of the digital signal processor is input
CL I Microprocessor command clock input
DAT I Microprocessor command data input
CE I Microprocessor command chip enable input
DRF O DRF (Defect RF) outputs a RF level detection
FSS (Focus Search Select) is a switching pin for the focus search mode
FSS I
(±search/+search for a reference voltage)
VCC2 — Servo system and digital system VCC
RFFI I Reference voltage bus control is connected
VR O Reference voltage output
LF2 I Constant setting for a disc defect detection
PH1 I Connected to the capacitor for the RF signal peak hold
BH1 I Connected to the capacitor for the RF signal bottom hold
LDD O APC circuit output
LDS I APC circuit input
VCC1 — RF system VCC
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