Gp4 Lm1 Soc Power Sequence Procedure - LG 42PA4500 Service Manual

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5. GP4 LM1 SOC Power Sequence Procedure

Copyright © 2012 LG Electronics Inc. All rights reserved.
Only for training and service purposes
▶Hot Point
SOC_RESET
Multi_PWR
0ms
SOC_RESET
+3.3V_AVDD
+1.10V_VDDC
+1.5V_DDR_IN
◈ SOC_RESET timing and Power sequence are ok.
288ms
/
[Spec] before all pwr input raise
+3.3V_AVDD
+1.10V_VDDC
+1.5V_DDR_IN
Threshold
LGE Internal Use Only

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