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2.5
DATA RECEIVE PATH
2.4
DATA TRANSMIT PATH
2.6
POWER SUB-SYSTEM
i
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I
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LITHIUM BACKUP
The receive signal is applied from the radio discriminator to
the DSP for data decoding.
The microprocessor and MDD5001 control other control
signals for data receiving indication.
During transmission, the user data is used to generate an
optimum modulating waveform for the radio. The DSP
generates this waveform.
The microprocessor and MDD5001 control other radio
control signals for data transmission.
Functional Description
The RSSI signal from the radio is sampled at two separate
locations on the board. The 68HCIIAI can sample RSSI
using its internal ADC. RSSI is also made available to the
DSP through a serial ADC communicating with the DSl"
A fuse protects the input line by disconnecting it when the
modem draws excessive current. A diode protects the
modem against reverse polarity of the input voltage.
The modem includes a group of regulators that receives the
DC input voltage and provides a regulated voltage for the
internal circuits.
This is a rechargeable lithium battery for RAM backup.
When the VRM 500 is powered off, power for memory
backup is supplied from the 3 V DC lithium battery.
2.7
2.3
DSP56156
The DSP section of the logic board is made up of the
DSP56156-40 16-bit digital signal processor, discrete
address decoding logic, and two 32 kB SRAMs. The DSP
performs
modulation/demodulation
functions
and
associated filtering.
The synchronous serial interfaces (SSI) provide a full-
duplex serial port for serial communication. Each SSI is
made up of an independent transmitter and receiver sections
and a common SSI clock generator. These interfaces are
synchronous because all serial transfers are synchronized to
a clock. In the VRM 500 SSI port No. 0 is used to interface
to the radio; SSI port No. 1 is used for interface with the
serial RSSI analog-to-digital converter.
The CODEC is a sigma-delta analog interface converter. It
contains one AID converter and one D/ A converter. It also
contains a reference voltage, bias current generator and
master clock circuit.
Software inside the DSP uses the CODEC to develop a base-
band data modulation signal for the radio.
Outputs from
the CODEC (SPKP and SPKM) are
differential signals. (Differential signals are the same, but
are 180
0
out of phase.) These voltages are not referenced to
ground, but are referenced to each other.
The CODEC output contains quantization noise due to the
finite number of voltage levels that the switched cap low-
pass filter is capable of outputting. This filter is internal to
theCODEC.
For smoothing out this noise, a filter formed by a
combination of resistors and capacitors provides a 3 dB
corner frequency of about 80 kHz while maintaining a low-
impedance output signal to the radio.
The radio's DISC (discriminator) output is connected to the
MIC input of the DSP internal CODEC.
68P02943C73
5
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