Interface Timing For Reverse-Channel Operation - Lear Siegler ADM-3 Maintenance Manual

KEY IS
RELEASED
I I
I
I
I
I DATA ISPACINGI
J
I
I
j
?
-
rL
COMPUTER DETECTS COMPUTER DETECTS
BREAK BREAK
AL TERMINAL
=-
TERMINAL
-
- -
~
TRANSMITTING
~
ITTING RECEIVING
TERMIN
TRANSM
CARRIER DETECT
CF, PIN 8
SECONDARY
TRANSMIT DATA
SA, PIN 11
SECONDARY
RECEIVE DATA
SB, PIN 12
RECEIVE DATA
EE, PIN 3
TRANSMIT DATA
BA, PIN 2
NOTE: DO
NOT RAISE
RTS UNTIL
BREAK
BREAK
FROM KEYBOARD
CLEAR TO SEND
eE,
PIN
5
REQUEST TO SEND
CA, PIN 4
NOTE: "BREAK" WHILE RECEIVING
SENDS SA TO MARK STATE.
NOTE: "BREAK" WHILE TRANSMITTING
SENDS BA TO SPACING STATE.
Figure
4-18.
Interface Timing for Reverse-Channel Operation
resistor Rl16 and Capacitors CI05 and C106
form an RC network providing proper timing.
When power is applied, CI05 and CI06 charge
exponentially through Rl15 and Rl16 until the
voltage at the junction ofRl16 and CI05 equals
the anode UA" firing voltage. At this time, one
of the unijunction's diodes that is connected
between the anode and anode gage ((G" becomes
forward biased allowing the capacitors to dis-
charge through another diode junction between
the anode gate and the cathode ((K" and on
through R120.
Rl17 and Rl18 control the voltage at which the
diode (anode-to-anode gate) becomes forward
4-22