Fujitsu MHN2300AT Manuals

Manuals and User Guides for Fujitsu MHN2300AT. We have 1 Fujitsu MHN2300AT manual available for free PDF download: Product Manual

Fujitsu MHN2300AT Product Manual

Fujitsu MHN2300AT Product Manual (236 pages)

DISK DRIVES

Brand: Fujitsu | Category: Storage | Size: 1.41 MB

Table of Contents

Table of Contents

13
- Operating Environment
  6
- Important Alert Items
  9
- Manual Organization
  11
- Chapter 6 Operations
  
  16
- CHAPTER 1 Device Overview
  
  21
  - Adaptability
    22
  - Features
    22
  - Functions and Performance
    22
  - Interface
    23
  - Device Specifications
    24
  - Specifications Summary
    24
  - Model and Product Number
    25
  - Power Requirements
    25
  - Table 1.2 Model Names and Product Numbers
    25
  - Table 1.3 Current and Power Dissipation
    26
  - Environmental Specifications
    27
  - Figure 1.1 Current Fluctuation (Typ.) at +5V When Power Is Turned on
    27
  - Table 1.4 Environmental Specifications
    27
  - Acoustic Noise
    28
  - Shock and Vibration
    28
  - Table 1.5 Acoustic Noise Specification
    28
  - Table 1.6 Shock and Vibration Specification
    28
  - Reliability
    29
  - Error Rate
    30
  - Load/Unload Function
    30
  - Media Defects
    30
- CHAPTER 2 Device Configuration
  
  33
  - Device Configuration
    34
  - Figure 2.1 Disk Drive Outerview
    34
  - Figure 2.2 Configuration of Disk Media Heads
    35
  - ATA Interface
    36
  - Drive Connection
    36
  - Drives Connection
    36
  - Figure 2.3 1 Drive System Configuration
    36
  - Figure 2.4 2 Drives Configuration
    36
  - System Configuration
    36
- CHAPTER 3 Installation Conditions
  
  39
- CHAPTER 4 Theory of Device Operation
  
  53
  - Disk
    54
  - Head
    54
  - Outline
    54
  - Subassemblies
    54
  - Actuator
    55
  - Air Filter
    55
  - Figure 4.1 Head Structure
    55
  - Spindle
    55
  - Circuit Configuration
    56
  - Figure 4.2 Power Supply Configuration
    57
  - Figure 4.3 Circuit Configuration
    58
  - Power-On Sequence
    59
  - Figure 4.4 Power-On Operation Sequence
    60
  - Self-Calibration
    60
  - Self-Calibration Contents
    60
  - Execution Timing of Self-Calibration
    61
  - Command Processing During Self-Calibration
    62
  - Read/Write Circuit
    62
  - Read/Write Preamplifier (HDIC)
    62
  - Write Circuit
    62
  - Table 4.1 Write Precompensation Algorithm
    63
  - Figure 4.5 Read/Write Circuit Block Diagram
    64
  - Figure 4.6 Frequency Characteristic of Programmable Filter
    65
  - Read Circuit
    65
  - Digital PLL Circuit
    66
  - Figure 4.7 Block Diagram of Servo Control Circuit
    67
  - Servo Control
    67
  - Servo Control Circuit
    67
  - Data-Surface Servo Format
    70
  - Figure 4.8 Physical Sector Servo Configuration on Disk Surface
    71
  - Figure 4.9 Servo Frame Format
    72
  - Servo Frame Format
    72
  - Actuator Motor Control
    73
  - Spindle Motor Control
    74
- CHAPTER 5 Interface
  
  77
  - Interface Signals
    78
  - Physical Interface
    78
  - Signal Assignment on the Connector
    79
  - Logical Interface
    82
  - I/O Registers
    83
  - Command Block Registers
    84
  - Control Block Registers
    89
  - Host Commands
    89
  - Command Descriptions
    92
  - Specifications
    105
Table of Contents

139
- At Command Issuance (I/O Registers Setting Contents)
  143
- (Dh)
  144
- (Dh) DV
  144
- (ER) Error Information
  144
- (Sn)
  144
- 1F2 (Sc)
  144
- 1F3 (Sn)
  144
- 1F4 (Cl)
  144
- 1F5 (Ch)
  144
- 1F6 (Dh)
  144
- 1F7 (ST) Status Information
  144
- Error Posting
  164
- Command Protocol
  166
- Pio Data Transferring Commands from Device to Host
  166
- Pio Data Transferring Commands from Host to Device
  168
- Commands Without Data Transfer
  170
- WRITE SECTOR(S) Command Protocol
  170
- Dma Data Transfer Commands
  172
- Other Commands
  172
- Ultra Dma Feature Set
  175
- Phases of Operation
  176
- Ultra Dma Data in Commands
  176
- Ultra Dma Data out Commands
  181
- Ultra Dma Crc Rules
  185
- Series Termination Required for Ultra Dma
  186
- Pio Data Transfer
  187
- Ultra Dma Data Transfer
  189
- Ultra Dma Data Burst Timing Requirements
  190
- Power-On and Reset
  202
Operations

203
- Device Response to the Reset
  204
- Response to Power-On
  204
- Response to Hardware Reset
  205
- Response to Software Reset
  207
- Response to Diagnostic Command
  208
  - Power Save
    209
- Power Save Mode
  209
- Power Commands
  210
  - Defect Management
    211
- Alternating Defective Sectors
  211
  - Read-Ahead Cache
    213
- Spare Area
  211
- Caching Operation
  214
- Data Buffer Configuration
  214
- Usage of Read Segment
  216
  - Write Cache
    222
- Acronyms and Abbreviations
  229

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