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Word
65
Minimum Multiword DMA transfer cycle time per word
15-0:
Cycle time in nanoseconds
66
Manufacturer's recommended Multiword DMA transfer cycle time
15-0:
Cycle time in nanoseconds
67
Minimum PIO transfer cycle time without flow control
15-0:
Cycle time in nanoseconds
68
Minimum PIO transfer cycle time with IORDY flow control
15-0:
Cycle time in nanoseconds
69-70
Reserved (for future command overlap and queuing)
71-74
Reserved for IDENTIFY PACKET DEVICE command.
75
As defined in the ATA reference
76
Serial ATA capabilities
15-10 Reserved
9
Supports receipt of host-initiated interface power management requests
8-4
Reserved
3
Reserved for future Serial ATA
2
1= Supports SERIAL ATA Gen-2 signaling speed
1
1= Supports SERIAL ATA Gen -1 signaling speed (1.5Gbps)
0
Reserved (set to 0)
77
Reserved for future Serial ATA definition
78
Serial ATA features supported
15-4 Reserved
3
1= device supports initiating interface power management
2
1= supports DMA Setup Auto-Activate optimization
1
1= supports non-zero buffer offsets in DMA Setup FIS
0
0= Reserved (set to 0)
79
Serial ATA features enabled
15-4 Reserved
3
1= device supports initiating interface power management enabled
2
1= supports DMA Setup Auto-Active optimization enabled
1
1= supports non-zero buffer offsets in DMA Setup FIS
0
0= Reserved (set to 0)
ATA Bus Interface and ATA Commands
Content Description
Maxtor DiamondMax 8S 40GB SATA
5-9
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