Circuit Diagrams; Main Pwb Circuit Diagram - JVC LT-26DY8ZG Service Manual

CIRCUIT DIAGRAMS

MAIN PWB CIRCUIT DIAGRAM (1/8) SHEET 1
VCC_12V
R139
S100
N.C.
5V_TUNER 3k3
PTC RES C101
VCC_5V
10n
N.C.
50V
R102
AGC 1 5k1
SHORT
R103 R106
TU 2 5k1 5k1
S101
S102
AS 3
50V
39p
C102 R104
SCL 4 100R
R105
SDA 5 100R
50V
39p
16V
1u
C103
NC 6
C104
R100
3k3 R140
VS 7
PTC RES
5k1 IF_AGC
S113
NC/ADC 8 AN_IF
R101
4k7 5V_TUNER
VST 9
S103
IF2 10
IF1 11
SCL_5V_IC
DIGITAL TUNER PWB
L112 12V_IF
PL302
10u
DIGITAL IF CONNECTOR
L116
10u
!
L102 5V_TUNER
10u
50V Q102 Q103
1n BF799 BF799
50V 50V
C138
1n 1n
R136 R135
N.C.
47R 47R
C135 C136
S117
R123
150R
1 IN1
L101
BLM21A601S
R124
2 IN2
5V_TUNER 150R
S119
R107
1k
VCC_33V
S118
IF_AGC
IC101
SCL_DVB 1 2Y1 VCC 16
2 2Y0 2Z 15
S105
S120
3 3Y1 1Z 14
AGC_DVB
S121
IF_AGC
4 3Z 1Y1 13 SDA_DVB
74HCT4053
5 3Y0 1Y0 12
S106
6 E S1 11
S107
7 VEE S2 10
TV/DVB_SWITCH
8 GND S3 9
(No.YA567<Rev.001>)2-7
L103 L114
VCC_5V
10u 330R_100MHZ_3A
L117 5V_DRX
10u
L104
VCC_3V3 3V3_DRX
10u
DRX_CLK
DRX POWER SUPPLY
50V
1n
C137
1 AVSS_ADC
L105 L106
5V_DRX 2 AVDD_ADC
10u
3 ANATSTX
4 ANATSTY
5V_DRX 5 AVDD_FE8
16V 6 AVSS_FE8
100n
AN_IF 7 AVSS_FE401
C119
8 IFINX
OUT1 4
L113
Z100
5V_DRX 9 AVDD_FE40
X6966M
600R_100MHZ_200mA
OUT2 5
GND 10 IFINY
3
11 AVSS_FE402
C121
100n
16V
5V_DRX
5V_TUNER
SDA_5V_IC
R134
5V_TUNER 4k7 5V_TUNER
R133
Q104
1k
BC848B
S114
2-8(No.YA567<Rev.001>)
3V3_DRX
SHEET 7
VGA_MUX_SW
X100
YPBPR_MUX_SW
C134
AUDIO_MUX_SW
20.25MHz
1n
50V SYNC_SW1
SHEET 3
TUNER_AGC 33
PORT1 32
PORT0 31
DVSS_CAP 30
DVSS 29
IC100
L110
DVDD 28
DRX3960A
C127
DVDD_CAP 27
SCL 26
33p
25V
33p
SDA 25
RESETQ 24
C128
TEST_EN 23
C126
100n
16V
5V_DRX
C142
R109
10u
Q100
100R 16V
BC848B SHEET 3
R114
75R
TUNER_CVBS_IN
SHEET 7
R115
75R
TUNER_CVBS_SW
MAIN PWB ASS'Y (1/8)
VE-20357300 [LT-26DY8ZG]
SYNC_SW2
VE-20357305 [LT-26DY8ZJ]
SHEET 3
SYNC_SW2
SW_ENABLE2
SHEET 5
3V3_DRX
L111
3V3_DRX
SHEET 3,5,6
R119
100R SCL_3V3_IC
R120
100R SDA_3V3_IC
3V3_DRX
SHEET 3,5,6
R122
Q101
470R RESET_IC
BC848B
17mb22_2_0905_1/10_0.0