Jp1: Clear Cmos Setting - IBT Technologies IB530 User Manual

JP1: Clear CMOS Setting

Use JP1 to clear the CMOS contents. Note that the power connector
should be disconnected from the board before clearing CMOS.
JP1
JP2: LVDS VDD Select (5V / 3.3V)
JP2
JP3: HDD LED Pin Header
JP4: CF Connector master/Slave Setting
JP4
IB530 User's Manual
INSTALLATIONS
Function
Normal (default)
Clear CMOS
VDD Setting
3.3V
5V
Pin # Signal Name
1 VCC
2 HDD_LED-
Setting Function
Short/Closed Master
Open Slave
9