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X10DRL-i Motherboard User's Manual
I-SGPIO1/2 & S-SGPIO Headers
Three SGPIO (Serial Link General
Purpose Input/Output) headers are lo-
cated on the motherboard. I-SGPIO1/2
support onboard I-SATA0-5, and S-
SGPIO supports S-SATA0-3 connec-
tions. See the table on the right for
pin definitions.
Standby Power Header
The +5V Standby Power header is
located at JSTBY1 on the mother-
board. See the table on the right for
pin definitions. (You must also have a
card with a Standby Power connector
and a cable to use this feature.)
BMC
JPL2
LEDM1
BIOS
LICENSE
LE6
BIOS
BT1
SP1
S-SATA3
S-SATA2
S-SATA1
PCH
S-SATA0
JSD1
A
C
B
I-SATA3
I-SATA2
I-SATA1
D
I-SATA0
1
JWD1
JD1
JL1
UID
VGA
JUIDB1
JPL1
LAN CTRL
LAN2
LAN CTRL
CPU2
CLOSE 1st
CLOSE 1st
OPEN 1st
CPU1
2-30
I-SGPIO & S-SGPIO Headers
Pin Definitions
Pin# Definition
1
NC
3
Ground
5
Load
7
Clock
Note: NC= No Connection
I-SGPIO0/1 & S-SGPIO Support
I-SGPIO1
I-SATA Ports 0/1/2/3 Supported
I-SGPIO2
I-SATA Ports 4/5 Supported
S-SGPIO
S-SATA Ports 0/1/2/3 Supported
Standby PWR
Pin Definitions
Pin#
Definition
1
+5V Standby
2
Ground
3
No Connection
USB0/1
COM1
USB12/13
(3.0)
LAN1
IPMI_LAN
X10DRL-i
Rev. 1.01
OPEN 1st
Pin
Definition
2
NC
4
Data
6
Ground
8
NC
A. I-SGPIO1
B. I-SGPIO2
C. S-SGPIO
D. Standby PWR
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