Aiwa XR-MP50 Service Manual page 38

Compact disc stereo system
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IC, UPD784216AYGC-107-8EU
Pin No.
Pin Name
1
MD2
2
X2FLG
3
DRVMUT
4
CDDAMUT
5
LRMUT
6
DOUTON
7, 8
NC
9
VDD
10, 11
X2, X1
12
VSS
13
XT2
14
XT1
15
RESET
16
DEC-INT
17
HDRQ
18
NC
19
SCOR
20 ~ 22
NC
23
AVDD
24
AVREF0
25
MP1/1.5
26
FB0/FBA
27
ADJ3
28 ~ 32
NC
33
AVSS
34
EQBST
35
EQFRQ
36
AVREF1
37
DEBUG1 (SI2)
38
DEBUG2 (SO2)
39
DEBUG3 (SCK2)
40
I-SD
41
O-SD
42
I-CLK
43
IO-BUSY
44
DECRST
45
I2CD
46
A-MUTE
47
I2CC
48 ~ 55
A0 ~ A7
56 ~ 63
D0 ~ D7
64 ~ 71
A8 ~ A15
I/O
O
Digital out ON/OFF control H : ON.
O
Not used.
O
Servo driver mute.
O
CDDA-DAC mute.
Not used.
Not used.
Not connected.
Power supply (5V).
I/O
Oscillator input / output for system clock (12.5MHz).
Ground.
Not used.
Connected to VSS.
I
MICON reset.
I
Decoder interrupt.
I
Decoder data request.
Not connected.
I
SUB-Q SYNC (S0,S1).
Not connected.
Power supply (5V).
Connected to AVDD.
I
CLV at MP3 mode, L : 1.5, H : 1. (Connected to VSS)
I
L : F Bias Auto. H : F Bias OFF. (Connected to VDD)
Connected to AVSS.
Connected to AVSS.
Ground.
O
RF AMP boost control. (Not used)
O
RF AMP frequency control. (Not used)
Connected to AVDD.
Connected to AVSS.
Not used.
Not used.
I
Host to unit data.
O
Unit to host data.
I
Host I/O clock.
I/O
I/O / High impedance 3 state.
O
ROM decoder (IC, LC89513K) reset.
O
IC, MAS3507D-G10 I2C data.
Mute on.
O
O
IC, MAS3507D-G10 clock.
O
SRAM / decode address.
I/O
SRAM / decode data.
O
SRAM / decode address.
– 38 –
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