Yamaha RX-V1500 Service Manual page 50

RX-V1500/DSP-AX1500
IC512: D601A002PYP180 (DSP P.C.B)
Decoder
No. Name
50
EMIF32 L2 Cache/
Memory
4 Banks
McASP1
64K Bytes
Total
McASP0
(4-Way)
McBSP1
McBSP0
L2
I2C1 Enhanced
Memory
DMA
Controller
DA610:
I2C0
(16 channel)
192K Bytes
Timer 1
DA601:
64K Bytes
Timer 0
GP1
GP0
R2 ROM
512K
Bytes
HPI16
Total
I/O Function
General purpose I/O0 port 4
General purpose I/O0 port 6
1.2V power supply
Ground
3.3V power supply
General purpose I/O0 port 5
General purpose I/O0 port 7
McBSP1 external clock source
3.3V power supply
Ground
1.2V power supply
Timer 1 Input
Timer 1 Output
1.2V power supply
Ground
McASP0 Transmission BCLK
Timer 0 Input
Timer 0 Output
McASP0 Reception BCLK
McASP0 Transmission/reception data 1
McASP0 Transmission LRCLK
1.2V power supply
Ground
McASP0 Reception LRCLK
3.3V power supply
Ground
McASP0 Transmission/reception data 0
McASP0 Reception MCLK
1.2V power supply
Ground
McBSP1 Transmission Frame Sync (Input in SPI slave state)
McBSP1 Transmission data
McBSP1 Transmission clock (Input in SPI slave state)
Ground
1.2V power supply
McBSP1 Reception clock
McBSP1 Reception data
McBSP1 Reception Frame Sync
Ground
1.2V power supply
Digital Signal Processors
L1P Cache
Direct Mapped
4K Bytes Total
C67x TM CPU
Control
Instruction Fetch
Registers
Instruction Dispatch
Control
Instruction Decode
Logic
Data Path A Data Path B
Test
A Register File B Register File
In-Circuit
Emulation
Interrupt
.L1t .S1t .M1t .D1 .D2 .M2t .S2t .L2t
Control
L1D Cache
2-Way Set
Associative
4K Bytes Total
Clock Generator,
Oscillator and PLL Power-Down
x4 through x25 Multipliers Logic
/1 through /32 Dividers