Yamaha HTY-760 Service Manual page 76

A B C
YSP-600/HTY-760
DSP 2/2
1
Q Q
3
2
5.2
5.2
5.2 5.2
3
0.2
0
5.2
0
DIGITAL POWER AMP.
0.2
0
0.2
0
5.2
0
IC601
0.2
0
0.2
0
5.2
4
0
0.2
5.0
0
2.5
2.5
0
5
T E
L 1 3
6
7
SUBWOOFER OUT
FRONT IN
SURROUND IN
8
CENTER IN
WOOFER IN
SUBWOOFER IN
9
w w w
10
# All voltages are measured with a 10MΩ/V DC electronic voltmeter.
# Components having special characteristics are marked s and must be replaced
with parts having specifications equal to those originally installed.
# Schematic diagram is subject to change without notice.
76
D E F
7 1 5
6 3
5.1 5.1
5.0 5.0
3.3
0
0
0.2
0
5.0
0
0.2
0
0.2
0
5.0
0
0.2
0
0.2
0
5.0
0
0.2
5.0
0
B-1
SPEAKER OUT
2.5
0
5.0
9 4 2 2 9 6 5 1 3
D/A CONVERTER
5.1
5.1
0
3.3
0
0
x a o
. i
G H
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1 5
0
5.1 5.1
5.1
5.0 5.0 5.0
0
0
0.2 0.2
0
0
5.0 5.0
0 0
DIGITAL POWER AMP.
0.2
0.2
0 0
0.2 0.2
0 0
5.0
5.0
0 0
IC602
0.2 0.2
0 0
0.2 0.2
0 0
5.0
5.0
0
0
0.2 0.2
5.0 5.0
0
0
2.5 2.5
2.5 0
0
5.0
Q Q
3 7
WOOFER L OUT
No replacement part available.
D-AMP
10.3
3.4
1.7
1.7
0.6
1.7
IC751
1.7
0
0
CB607
5.1
0
Page 78 L2
to INPUT (1)_CB504
u 1 6 3
y
PVDDREG
PLIMIT
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I J K
2 4
8 9
CB601
5.1
5.0
CB602
3.3
CB603
SPEAKER OUT
CB604
6 3 1 5 1 5 0 8
CB605
0.1
3.3
0
0
0
0
0
0
0.1
0
3.4
3.4
3.4
3.4
CB606
IC751: YDA147-SZE2
Digital audio power amplifier
Lch
Feed Back PVDDPL
OUTPL
INLP
Gain Power PWM Level
Logic
PVSSL
Control Limit Amp Shift
INLM
OUTML
Feed Back MUTE
m PVDDML
PLIMIT
GAIN0
GAIN1
SLEEPN
MUTEN
c o
CKIN CKOUT
NCDRC0
NCDRC1 SLEEPN
Non-Clip
NC 1 . 36 NC Oscillator MUTEN OTP
PVDDREG 3.3V MUTE
NC 2 35 NC DRC OCP
Regulator Control
AVDD Control
3 34
GAIN1 UVLO
AVDD 4 33 GAIN0 VREF/ PROTN
VREF
REF
INLP 5 32 NCDRC1
6 31
INLM NCDRC0
VREF 7 30
CKIN
INRM 8 29 CKOUT
9 28 Feed Back PVDDPR
INRP MUTEN MUTE
10 27
AVSS PROTN OUTPR
11 26 SLEEPN INRP
Gain Power PWM Level
Logic PVSSR
NC 12 25 NC Control Limit Amp Shift
INRM
OUTMR
Feed Back
Rch PVDDMR
L M N
2
9 8 9 9
DRIVER
TWEETER x 8
POINT B-1 XL601 (Pin 48 of IC601)
DRIVER
TWEETER x 8
IC601, 602: YDA141-SZ
Sound projector
9 2 4 9 8 2 9 9
Microprocessor Quarts Crystal circuit
Microprocessor interface complies with EVE.
SO is bus connected by /CS.
IRQ terminals are connected in
daisy chain, forming an OR circuit.
Chip#15 XIN XOUT Speaker A~H
WCK fs=32/44 /48k*2 DAT[15:0]
OUTPC
WCK WCK2
OUTMC
BCK LT[9:0]
TI/DSP
AMHOP
DSI[3:0]
FSHOP[1:0]
GAINA[1:0]
GAING[1:0]
DIR MCK ENABLE[7:0]
MCK=24 576MHz
Fixed SPCHK D4_core
/OCPO[7:0]
/SPERR[7:0]
/UVLC
/CKDET
8ch D4
SA_DSP /OTP
DAC & PDD Amp
/OTW
Beam & NoiseShaper
CH_A~H
MASKUVLO
MASKCKDET DAC-I,J
MASKOTP
MASKOTW
MASKOCP
TESTOTP
TESTOCP
DRIVER
DACENABLE[1:0]
WOOFER L PWMSW
/TEST
/TRIDET
DEGLITCH
EXT[0:1]
CLKC
CLKC
For DAC monitor
To be modified if there are many SDC latches
Chip#14 XIN
CLKC D4-SPJ
Bus connected to
microprocessor
Chip#0
XIN
CLKC D4-SPJ
DRIVER
WOOFER R
IC603: WM8728
24-bit, 192 kHz stereo DAC
MODE LATI2S SCKDSD SDIDEM MUTEB CSBIWL ZERO
16 20 19 18 17 15 5
8 VOUTR
BCKIN 3
LRCIN 1
DIN 2 VOUTL
11
12 VMID
4 10 7 14 13 9 6
MCLK AVDD DVDD VREFP VREFN AGND DGND