Onkyo DV-SP300 Service Manual page 33

Schematic diagram & printed circuit board view only
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MICROPROCESSOR TERMINAL DESCRIPTION
(2/2)
PIN
PIN NAME
NUMBE
59
T11/S25
60
T10/S26
61
T9/S27
62
T8/S28
63
T7
64
T6
65
T5
66
T4
67
T3
68
T2
69
T1
70
T0
71
VFDP
72
VDD
73
VPP
74
PG0
75
PG1
76
PG2
77
PG3
78
PE0/'EC0/INT0
79
PE1/'EC1/INT1
80
PE2/IN2
MAIN FUNCTION
DUAL PURPOSE OUTPUT FOR FDP TIMING AND SEGMENT SIGNAL.
DUAL PURPOSE OUTPUT FOR FDP TIMING AND SEGMENT SIGNAL.
DUAL PURPOSE OUTPUT FOR FDP TIMING AND SEGMENT SIGNAL.
DUAL PURPOSE OUTPUT FOR FDP TIMING AND SEGMENT SIGNAL.
TIMING SIGNAL OUTPUT FOR FDP
TIMING SIGNAL OUTPUT FOR FDP
TIMING SIGNAL OUTPUT FOR FDP
TIMING SIGNAL OUTPUT FOR FDP
TIMING SIGNAL OUTPUT FOR FDP
TIMING SIGNAL OUTPUT FOR FDP
TIMING SIGNAL OUTPUT FOR FDP
TIMING SIGNAL OUTPUT FOR FDP
PROVIDES VOLTAGE FOR FDP
POSITIVE POWER SUPPLY PIN.
POSITIVE POWER SUPPLY FOR THE PROGRAMMABLE ON-CHIP PROM.
4-BIT IN/OUTPUT PORT;SINGLE BIT ADDRESSABLE
4-BIT IN/OUTPUT PORT;SINGLE BIT ADDRESSABLE
4-BIT IN/OUTPUT PORT;SINGLE BIT ADDRESSABLE
4-BIT IN/OUTPUT PORT;SINGLE BIT ADDRESSABLE
INPUT FOR EXTERNAL INTERRUPT REQUEST.
INPUT FOR EXTERNAL INTERRUPT REQUEST.
INPUT FOR EXTERNAL INTERRUPT REQUEST.
DV-SP300
IN/OUT
REMARK
O
O
O
O
O
O
O
O
O
O
O
O
-
-
-
I/O
I/O
I/O
I/O
I
I
I
END

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