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KBR0, KBR1, KBR2
H2, H1, H3
KBC0, KBC1, KBC2
J5, J3, J2
to Keyboard
KEYPAD
BKLITE_CNTL
K3
B10
DISPLAY
CE5
to Display
L6
PB12
INTERFACE
A4
SIM_PD
SIM
LS1_IN
29
LS2_IN
31
INTER
LS3_TX
38
FACE
LS3_RX
39
A1
HEADSET_INT
C1
CLK_SELCT
E2
TX_EN
CTM
DM_CS
E1
TX_KEY
E3
MODULE
RX_EN
E4
RX_ACQ
P2
RESET
( SDTX ) BDX
B6
( TX_CLK ) BCLKX
SERIAL
B3
INTER
( SCLK_OUT ) BCLKR
DSP
from / to MAGIC
B4
FACE
( SDFS ) BFSR
D4
( SDRX ) BDR
J 810
A3
DSC_EN_B+
7
K2
DSC
URXD_IN
10
UART
A5
( for RS232 )
UTXD
INTERF.
8
A6
EXT_B+
EXT_B+
1
J901
C901
VR830
GND
2
CON_POWERJACK_B
GND
9
SPI
GND
11
INTERFACE
NC
5
( Ext Accessory Sense)
3
59
MAN_TEST_AD
DSC_EN_AD
58
SENSE
57
DOWNLINL_AD
BATT_THERM
56
CNTL.
55
EXT_B+_AD
JEKYLL
U601
UPLINK
4
G_CAP2
DOWNLINK
6
13MHz
GCAP_CLK
12
Audio Codec
VAG_FILTRD
19
3
1
U946
4
MIC
3
4
2
1
R940
C955
IRQ_2
(to WHITE_CAP)
CONN
HEADSET
J940
M3682 - BLOCK DIAGRAM - PAGE 1/2
V2
C4, C14, F10,H4, K5, K13, P13
V3
A9, A10, C5, G12, K6, K10, M8, M11
WHITE_CAP
SPI
INTERFACE
M
U700
E
M
O
R
Y
I
CE0 ( Flash ROM CS )
CPU
D9
N
CE1 ( Flash ROM OE )
T
B9
E
R
C9
F
E10
A
C
C10
E
B10
CTM
F1
EXT_B+_EN
L7
CHARGE
STBY_PC5
CHG
A / D
L1
SPI
TIMER
INTERFACE
B7
H10
P4
CR813
TRICKLE CHARGING
32.768 KHz
GCLK
32.768 KHz
67
70
71
SPI
REAL TIME
SENSE
INTERFACE
CLOCK
CNTL
U602
LEVEL
HYDE
SHIFTER
G_CAP2
50 - 29
1 - 20
Inter
Connections
47
4
Logic Control
RESET
24
21
Audio
Codec
VBOOST1
79,
REG.
41
52
22
34
66
27 28
5.0V
SPKR
U950
Q682
L638
ALRT
ALRT_VCC
B+
MAGIC SPI
ADDRESS BUS
DATA BUS
RESET
12
U908
14
26
37
V2
FLASH ROM
28
47
U911
CE2 ( RAM Byte Control 1 )
SRAM
40
CE3 ( RAM Byte Control LB+)
39
V1
V2
DEEP SLEEP
SW_V1
SW_V2
CIRCUIT
VREF
BATTERY
to Jekyll
J803
2
4
1
5, 6
CHARGING / DISCHARGING
Q681
J804
3, 7
J801
CR681
R691
J906
B+
6
1
TRICKLE CHARGING ENABLE
Q685
2
BATT+
51
PWR_SW
64
EXT_B+
56
CLK
from WhiteCap
6
J665
SIM_PD
RESET
4
SIM
SIM_I/O
Con.
5
1
2, 3
VSIM1
29
LS1_IN
31
LS2_IN
38
LS3_TX
39
LS3_RX
64
PWR_SW
62
STBY_PC5
43
VREF
VREF
2.775V,for MAGIC
REG.
80
V3
V3
1,8V, for WhiteCap
REG.
21
V2
2.775V, for WhiteCap logic outputs, RAM, FLASH, EEPROM
V2
REG.
75
V1
5.0V, for DSC Bus, Negative Voltage Regulator
V1
REG.
76
VSIM
VSIM1
3.0 or 5.0V, for SIM Card Circuit
REG.
74, 77
61
V_BOOST1
5.6V - 7,6V for Backlight
to MAGIC
33
V2
7
11
2
CE5
U703
from WhiteCap
EEPROM
PB12
Q905 / U906
CE4 ( EEPROM OE )
1
CE5 ( EEPROM CS)
27
( -5V )
2
KBR0, KBR1, KBR2
1
V1
U907
to WhiteCap
KBC0, KBC1, KBC2
4
Parts of
Backhousing
THERM
Assembly
BATT+
GND
BKLITE_CNTL
CHG-
BATT+
EXT_B+
5
3
Q671
2
4
Q671
6
1
CHG-
to Battery
DISPLAY
V2
1
RESET
6
GND
3, 17, 18
DP_EN
4
U905
4
DP_ON_OFF
5
KEYPAD
PWR_SW
to Hyde
BACK
V_BOOST1
LIGHT
from Hyde
C
B
Q901 / 902
from WhiteCap
E
RX SIGNAL PATH
TX SIGNAL PATH
MAIN VCO SIGNAL PATH
TUNING VOLTAGES
REFERENCE CLOCK
Orderable Part
Non - Orderable Part
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