Circuit Description - Vertex VX-4500 Series Service Manual

Uhf fm transceiver
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Circuit Description

1. Circuit Configuration by Frequency
The receiver is a double-conversion superheterodyne with a first
intermediate frequency (IF) of 67.65 MHz and a second IF of
450 kHz. Incoming signal from the antenna is mixed with the
local signal from the VCO/PLL to produce the first IF of 67.65
MHz. This is then mixed with the 67.2 MHz second local oscil-
lator output to produce the 450 kHz second IF. This is detected
to give the demodulated signal. The transmit signal frequency
is generated by the PLL VCO and modulated by the signal from
the microphone. It is then amplified and sent to the antenna.
2. Receiver System
2-1. Front-end RF amplifier
Incoming RF signal from the antenna is delivered to the RF
Unit and passes through the Low-pass filter. Undesired frequen-
cies are removed by the varactor diode tuned band-pass filter
consisting of diodes D1013 & D1015 (both RKV500KJ) and
Coils L1015 & L1018, and capacitors C1017, C1116, C1118,
C1130, C1117, C1135, C1137, C1139, C1151, and C1156. The
passed signal is amplified by Q1021 (2SC3356) and more-
over cuts animage frequency with the tuned band pass filter
consisting of Coils L1025, & L1028, and capacitors C1173,
C1181, C1182, C1183, C1188, C1197, C1198, C1205, &
C1212. The filtered RF signal is then delivered to the first Mixer.
2-2. First Mixer
The 1st mixer consists of Q1040 (AK1220). Buffered output
from the VCO is amplified by Q1026 (2SC5226) to provide a
pure first local signal between 382.35 and 444.35 MHz for in-
jection to the first mixer. The output IF signal is sent to the
crystal filter. The IF signal then passes through monolithic crystal
filter XF1001 (± 5.5 kHz BW) to strip away all but the desired
signal.
2-3. IF Amplifier
The first IF signal is amplified by Q1049 (2SC5226). The am-
plified first IF signal is applied to FM IF subsystem IC Q1054
(NJM2591V) which contains the second mixer, second local
oscillator, limiter amplifier, noise amplifier, and S-meter am-
plifier. The signal from reference oscillator X1002 is multiplied
3 times in Q1054 (NJM2591V). It is mixed with the first IF
signal and becomes the second IF signal of 450 kHz. The sec-
ond IF then passes through the ceramic filter CF1002 (for wide
channels) or CF1001 and CF1003 (for narrow channels) to strip
away unwanted mixer products and remove amplitude varia-
tions in the 450 kHz IF before detection of the speech by the
ceramic discriminator CD1001.
VX-4500/-4600 Series UHF FM Transceiver Service Manual
2-4. Audio amplifier
Detected signal from Q1054 (NJM2591V) is delivered to
Q1010 (FQ0801) pin 28 and is output by Q1010 (FQ0801)
pin 17 through the band pass filter. When the optional unit is
installed, Q1010 (FQ0801) is made "OFF" and the AF signal
from Q1010 (FQ0801) pin 21 goes to the optional unit and
returns to Q1010 (FQ0801) pin 20 from the optional unit. When
the optional unit is not installed, Q1010 (FQ0801) is made
"ON" the AF signal goes through Q1010 (FQ0801) pin 20/21.
The signal is stored in the AF volume via AF mute and the de-
emphasis inside Q1010 (FQ0801). The AF volume is control-
ling Q1010 (FQ0801) by the CPU. After that, itrnters AF power
amplifire Q1003 (TDA1519CTH) after passing AF volume.
The output of Q1003 (TDA1519CTH) drives a speaker (it
chooses the external SP or internal SP in J1001).
2-5. Squelch Circuit
There are 16 levels of squelch setting from 0 to 15. The level 0
means open squelch. The level 1 means the threshold setting
Level and level 15 means tight squelch. From 1 to 14 is estab-
lished in the middle of threshold and tight. The bigger figure is
nearer the tight setting. The level 16 becomes setting of carrier
squelch.
2-5-1. Noise Squelch
The noise squelch circuit is composed of the band pass filter of
Q1054 (NJM2591V), noise amplifier Q1060 (2SC4617), and
noise detector D1048, D1052 (both DA221). When a carrier
isn't received, the noise ingredient which goes out of the de-
modulator Q1054 (NJM2591V) is amplified in Q1060
(2SC4617) through the band pass filter Q1054 (NJM2591V),
is detected to DC voltage with D1048 and D1052 (both DA221),
and is inputted to pin 15 the A/D port of the Q1041
(LC88F52H0A) CPU. When a carrier is received, the DC volt-
age becomes "LOW" because the noise is compressed. When
the detected voltage to CPU is "HIGH", the CPU stops AF out-
put with Q1010 (FQ0801) "OFF". When the detected voltage
is low, the CPU makes Q1010 (FQ0801) "ON" and the AF
signal is output.
2-5-2. Carrier Squelch
Pin 14 (A/D port) of Q1047 (NJM2904V) CPU detects RSSI
voltage output from pin 12 of Q1054 (NJM2591V), and con-
trols AF output. The RSSI output voltage changes according to
the signal strength of carrier. The stronger signal causes the
RSSI voltage to be higher voltage. The process of the AF signal
control is the same as Noise Squelch. The shipping data is ad-
justed 3 dB higher than squelch tight sensitivity.
7

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