Yamaha RX-V671 Service Manual page 74

RX-V671/HTR-6064/RX-A710
Pin
Port Name
No.
79 P19_3 DK1_AP
80 P17_3 DK1_PON
81 P17_2 UAW_PON
82 P17_1 NCPU_PON
83 P17_0 NET_SEL_M
84 P19_2 NET_SEL_Z
CS0/A23/TXD6/
85 FLASH_N_CS
SDA6/SRXD6/P4_7
CS1/A22/RXD6/
86 A[22]
SCL6/STXD6/P4_6
87 CS2/A21/CLK6/P4_5 A[21]
CS3/A20/N_CTS6/N_
88 A[20]
RTS6/N_SS6/P4_4
A19/TXD3/SDA3/
89 SRXD3/OUTC2_0/ A[19]
ISTXD2/IEOUT/P4_3
90 P11_6
A18/RXD3/SCL3/
91 STXD3/ISRXD2/IEIN/ A[18]
P4_2
92 P11_5
93 A17/CLK3/P4_1 A[17]
A16/N_CTS3/N_
94 A[16]
RTS3/N_SS3/P4_0
95 P16_7/TXD10 DK_MOSI
96 P16_6/RXD10 DK_MISO
97 P16_5/CLK10 R32C_N_INT
P16_4/N_CTS10/N_
98 BF_MT
RTS10
A15/[A15/D15]/TA4IN/
99 A[15]
U/P3_7
A14/[A14/D14]/
100 A[14]
TA4OUT/U/P3_6
A13/[A13/D13]/TA2IN/
101 A[13]
W/P3_5
A12/[A12/D12]/
102 A[12]
TA2OUT/W/P3_4
103 P16_3/TXD9 NCPU_PIC_MISO
104 P16_2/RXD9 NCPU_PIC_MOSI
105 P16_1/CLK9 NCPU_PIC_SCK
P16_0/N_CTS9/N_
106 NCPU_N_RST
RTS9
A11/[A11/D11]/TA1IN/
107 A[11]
V/P3_3
A10/[A10/D10]/
108 A[10]
TA1OUT/V/P3_2
A9/[A9/D9]/TA3OUT/
109 A[9]
UD0B/UD1B/P3_1
110 D20/P12_4
D19/N_CTS6/N_
111
RTS6/N_SS6/P12_3
D18/RXD6/SCL6/
112
STXD6/P12_2
113 D17/CLK6/P12_1 FPGA_SCK
D16/TXD6/SDA6/
114
FPGA_MOSI
SRXD6/P12_0
115 VCC VCC
A8/[A8/D8]/TA0OUT/
116 A[8]
UD0A/UD1A/P3_0
117 VSS VSS
A7/[A7/D7]/AN2_7/
118 A[7]
P2_7/TXD10
A6/[A6/D6]/AN2_6/
119 A[6]
P2_6/RXD10
A5/[A5/D5]/AN2_5/
120 A[5]
P2_5/CLK10
74
Related Power Supply
Function Name ON
I/O Logic I/O
I L act
O H act
O H act
O H act
O H NET
O H NET
O L act
B Bus
B Bus
B Bus
B Bus
--- O Low
B Bus
--- O Low
B Bus
B Bus
O Data
I Data
O L act
I H act
B Bus
B Bus
B Bus
B Bus
O Data
I Data
I Clock
O L act
B Bus
B Bus
B Bus
--- O Low
--- O Low
--- O Low
O Clock
O Data
B Bus
B Bus
B Bus
B Bus
OFF
Logic
I --- iPod accessory power
O Low Dock power supply
O Low UAW power supply control
O Low NET/USB power supply
O Low Main USB/NET select
O Low Zone USB/NET select
O Low External bus Flash ROM chip select
O Low External bus
O Low External bus
O Low External bus
O Low External bus
O Low Spare
O Low External bus
O Low Spare
O Low External bus
O Low External bus
O Low Dock UART transmission data
I --- Dock UART reception data (3.3V logic input)
O Low Interrupt of R32C to Blackfin
O Low Mute signal from Blackfin (NCPU_N_INT distinction use)
O Low External bus
O Low External bus
O Low External bus
O Low External bus
O Low Network microprocessor SPI transmission data
O Low Network microprocessor SPI reception data
O Low Network microprocessor SPI communication clock
O Low Network microprocessor reset
O Low External bus
O Low External bus
O Low External bus
O Low Spare
O Low Spare
O Low Spare (After FPGA Config, I2C is possible)
O Low FPGA clock (at Boot)
O Low FPGA transmission data (at Boot)
---
O Low External bus
---
O Low External bus
O Low External bus
O Low External bus
Detail of Function