Amibios Post Code (Aptio) - TYAN S5535 Quick Reference Manual

4.2 AMIBIOS Post Code (Aptio)

The POST code checkpoints are the largest set of checkpoints during the BIOS pre-
boot process. The following table describes the type of checkpoints that may occur
during the POST portion of the BIOS:
Checkpoint Ranges
Status Code Range
0x01 – 0x0B
0x0C – 0x0F
0x10 – 0x2F
0x30 – 0x4F
0x50 – 0x5F
0x60 – 0x8F
0x90 – 0xCF
0xD0 – 0xDF
0xE0 – 0xE8
0xE9 – 0xEF
0xF0 – 0xF8
0xF9 – 0xFF
Standard Checkpoints
SEC Phase
Status Code Description
0x00 Not used
Progress Codes
0x01 Power on. Reset type detection (soft/hard).
0x02 AP initialization before microcode loading
0x03 North Bridge initialization before microcode loading
0x04 South Bridge initialization before microcode loading
0x05 OEM initialization before microcode loading
0x06 Microcode loading
0x07 AP initialization after microcode loading
0x08 North Bridge initialization after microcode loading
0x09 South Bridge initialization after microcode loading
0x0A OEM initialization after microcode loading
0x0B Cache initialization
Description
SEC execution
SEC errors
PEI execution up to and including memory detection
PEI execution after memory detection
PEI errors
DXE execution up to BDS
BDS execution
DXE errors
S3 Resume (PEI)
S3 Resume errors (PEI)
Recovery (PEI)
Recovery errors (PEI)
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