Schematic Diagram - Yamaha DSP-AX2 Service Manual

A B C
SCHEMATIC DIAGRAM (DSP)
1
Point q (Pin 1 of IC501)
V : 2V/div, H : 50 nsec/div
DC, 1 : 1 probe
0V
Point w (Pin 56 of IC503)
V : 2V/div, H : 50 nsec/div
2 DC, 1 : 1 probe
0V
IC505 : PQ025EZ5MZP
+2.5V Regulator
1 3
DC INPUT (VIN) DC OUTPUT (VO)
3
I C
2 ON/OFF CONTROL (VC)
5
GND
0
IC512, 515–519, 525–527 :
4.9
µ
PC4570G2
0
IC509 : NJM2904M-T1
Dual OP Amp
0
1
OUT 1 8 +V CC
4.9
–IN 2 7 OUT
1 2
+ – + – 0
+IN 3 6 –IN
1 2
4
–V 4 5 +IN
CC 2
0
4.9
0
IC507, 513 : TC74HC00AF
Quad 2 Input NAND
0
4.9
A1 1 14 V DD
0
B1 2 13 B4
Y1 3 12 A4
A2 4 11 Y4
0
B2 5 10 B3 4.9
5
0
Y2 6 9 A3
V SS 7 8 Y3
0
4.9
IC510, 511 : TC74HCUO4AF-TP1
0
Hex Inverters
1A 1 14 V
DD
0
1Y 2 13 6A 4.9
0
2A 3 12 6Y
2Y 4 11 5A
3A 5 10 5Y
6
3Y 6 9 4A
V SS 7 8 4Y
IC508 : TC74VHCT08AF
Quad 2 Input AND
A1 1 14 V DD
B1 2 13 B4
Y1 3 12 A4
A2 4 11 Y4
7
B2 5 10 B3
Y2 6 9 A3
V 7 8 Y3
SS
IC520, 523 : DF1704E
24 bit Digital Filter
3 4 5 19 20
BCKIN 2
26 BCKO
SERIAL
8
LRCIN 28 INPUT
I/F
8X OVERSAMPLING 25 WCKO
DIN 1 DIGITAL FILTER OUTPUT
WITH
I/F
FUNCTION CONTROLLER DOL
MD/CKO 11 24
MC/LRIP 12
ML/RESV 13 23 DOR
MODE
MODE 10 CONTROL
I/F SCK
MUTE 15
RST 14
CRYSTAL OSC POWER SUPPLY
DEM 16
17 18 27 6 7 9 22 8
IC521, 522, 524 : PCM1704F
9
24 bit D/A Converter
BCLK 2
23—BIT DAC A
WCLK 7
SERIAL INPUT I/F
DATA 1 &
CONTROL LOGIC
20BIT 23—BIT DAC B 14 IOUT
9
INVERT 10
REFERENCE BIPOLAR
3 NC
& OFFSET
SERVO
8 NC
13 NC
POWER SUPPLY 18 NC
19 17 4 5 6 20 16 11 12
10
D E F
2.6 5.0
3.4
2.6
0
0
4M
DRAM
5.0 0
0.1 0.1
0.1 0.1
0.1 0.1
0 0.1
0
0
5.0
2.5
0.8 0
0.4
0 0
4.9
0 0
4.9 4.0
~
0 0.8
3.3
4.0
4.9
2.1
3.1 2.1
1.7 2.0
2.0
4.9 1.0 ~
0
4.9 3.7 ~
3.3 ~ ~
~ ~
0
0
5.0
0
0
3.4
0
4.8
0 0 0
0
4.8
0
0
0 0
4.0
0
4.0
4.0
4.9 4.9
2.5
4.9
3.7
4.9
3.7
0
2.0
0
0
0 0
0
0
0
0
CD DIGITAL
4.9 4.9
4.9
2.6 0 0 0
0
3.1 0.4
0 0
0
4.9
2.6 0 0 0 0
3.1
0.4
0
4.9
4.9 0
0 0
0
0
4.9
IC514 : AK4527VQ
96kHz 24 bit 6ch CODEC
L IN+
A D C H P F
L IN–
MCLK
R IN+
LRCK
A D C H P F
R IN–
BICK
SDOS 1 33 DZF2
I2C 2 32 RIN+
SMUTE RIN–
3 31
BICK LIN+
4 30 A U D I O
L OUT1 L P F DAC DATT
LRCK 5 29 LIN– I / F
SDTI1 6 28 ROUT1
R OUT1 SDOUT
L P F DAC DATT
SDTI2 7 27 LOUT1
SDTI3 8 26 ROUT2
L OUT2 L P F DAC DATT
SDTO 9 25 LOUT2 SDIN1
SDIN2
D AUX 10 24 ROUT3
R OUT2 L P F DAC DATT
SDIN3
DFS 11 23 LOUT3
L OUT3 L P F DAC DATT
R OUT3 L P F DAC DATT
G H
P-E73/J71
P-E74/J72
E-1
L-2
RL
L
3.4 5.0
C
5.0
0
FL
0.1
0.1
0.1
2.5
0
0
3.3
3.3
3.3
0
C
3.3
3.3
0
0
0
0.7
0
0
~
AC3D3 0
0
RL/RR
1.6
1.6
1.6
q
0
0
0
2.5
0
L/R
w
RAM
AC-3 RF DEMODULATOR
IC502 : MSM514260C-60JS
262,144-word x 16 bit Dynamic RAM
VCC 1 40 VSS TIMING
RAS
GENERATOR
DQ1 2 39 DQ16
DQ2 3 38 DQ15
LCAS
DQ3 4 37 DQ14
MCLK
UCAS
DQ4 5 36 DQ13
LRCK
VCC 6 35 VSS
BICK
DQ5 7 34 DQ12
COLUMN
DQ6 DQ11
DAUX 8 33 9 ADDRESS
DQ7 DQ10 BUFFERS
9 32
DQ8 10 31 DQ9
FORMAT
NC 11 30 NC
CONVERTER INTERNAL
REFRESH
NC 12 29 LCAS A0~A8 ADDRESS
CONTROL CLOCK
COUNTER
WE 13 28 UCAS
RAS 14 27 OE
NC 15 26 A8
SDOS ROW
ROW WORD
A0 16 25 A7 9 ADDRESS 9
DECODERS DRIVERS
SDTO BUFFERS
A1 17 24 A6
SDTI1
A2 18 23 A5
SDTI2
VCC
A3 19 22 A4
SDTI3
VCC 20 21 VSS
ON CHIP
VBB GENERATOR
VSS
I J K
RC
D/A
DIGITAL
CONVERTER
FILTER
-4.9
~
L/R
2.4 -2.3
3.4
-4.9 -2.3
3.3
0
0 0
~ L
4.9
1.2 1.6 0
0
1.7 0 0
0 2.4
0 2.4
0 3.3 2.1 0
4.7 2.4 2.6 0
4.7 ~ 4.9
1.6 ~
0
4.7
0
4.7
4.7
0 -4.9
~
0
2.4 -2.3
4.7
0
0
-4.9 -2.3
4.8 4.6
0 0
4.7
4.9
0
0
0
2.4
C 2.7
4.8 4.9
0.7 1.6
1.7 -4.8
1.6 0
0 2.4 -2.3
2.4
4.7 2.4
RC/LFE
-4.8 -2.2
4.7 1.7
1.6 0 0
4.9
4.7 0
FL/FR 0
0
2.4
4.7
0
0 4.7 2.7
0
0 4.9
0 4.7
0
0
4.8
4.7 4.6
0
4.8
RC/LFE
0
0 2.5
0 2.5
1.6 2.5
1.6 2.5
0 2.5
0 2.5
~ 2.5
0 2.5
0 2.5
0 2.5
FL/FR
RL/RR
0
2.8 2.8
2.8
3.3
0
0 2.8
2.8
CODEC
3.3
(A/D & D/A CONVERTER)
0
0
2.8 2.8
2.8
3.3
0
0 2.8
2.8
3.3
0
0 0 0 -11.0
0
0
0
0 -11.0
0
0
IC504 : CY62256LL-70SNCT
32K X 8 bits Static RAM
A5 1 28 VCC
WE OE
A6 2 27 WE
I/O
A7 3 26 A4
CONTROLLER
A8 4 25 A3
OUTPUT
8 8
I/O BUFFERS
A9 5 24 A2 INPUT BUFFER
CONTROLLER
DQ1~DQ8 A10 6 23 A1 A10
A9
COLUMN A11 7 22 OE
9 INPUT 8 A8
DECODERS 8
BUFFERS A7
A12 8 21 A0
A6 512 X 512
A13 9 20 CE
A5 ARRAY
SENSE I/O
16 16 A4
AMPLIFIERS SELECTOR A14 10 19 I/O7
A3
I/O0 11 18 I/O6 A2
INPUT I/O1 12 17 I/O5
8 8
BUFFERS CE
POWER
I/O2 13 16 I/O4 COLUMN
MEMORY
DQ9~DQ16 DOWN
CELLS WE DECODER
GND 14 15 I/O3
OUTPUT
8 8 OE
BUFFERS
L M N
DSP-AX2
X : NOT USED
CIRCUIT CHANGES BY MARKET. O : USED
11.6
0 11.6
-11.0 0
0
0 0
0 0
-11.0
0 0
-11.0
0
0
0 0
0
0
0
-11.6
-11.6
C
11.6
0
-11.0 0
0 0
0 0 0
-11.0
0 0
-11.6
11.6
11.6
2.5
2.5
2.5 2.5
2.5
2.5
2.5
2.5 2.5
2.5
2.5
2.5
-11.6
-11.6
RC
11.6
0
0
0
0
0.6
0
0.6
0
0
0
0
-11.6
FL 11.6
0
0
0
0
0.6
0
0.6
0
0
0 0
-11.6
RL
11.6
0
0
0
0
-11.0
0
-11.0
0
0
0 0
-11.6
I/O0
I/O1
I/O2
Conditions
I/O3
• INPUT: DVD auto
I/O4
• PROGRAM: PRO LOGIC DSP
I/O5
I/O6
* All voltage are measured with a 10MΩ/V DC electric volt meter.
I/O7
* Components having special characteristics are marked Z and
must be replaced with parts having specifications equal to those
originally installed.
* Schematic diagram is subject to change without notice.
E-72/J-70