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1
QQ
- Pin Functions(PE5455A)
3 7 63 1515 0
Pin No.
Pin Name
1
AVREF
A
2
AVSS
3
EMP
4
CLAMP
5
EVDD
6
CAMVOL
7
E/LVOL1
8
IC/FLMD0
9
VDD
10
REGC
11
VSS
12
X1
13
X2
B
reset
14
15
XT1
16
XT2
17
PULLDOWN
18
EMC
xint
19
20
NC
brst
21
22
BSI
23
BSO
bsck
24
25
FTXD
C
26
FRXD
27
BRXEN
28
BSRQ
29
NC
30
E/LVOL2
TE
L 13942296513
31
E/LREV
32
E/LFWD
33
EVSS
34
EVDD
35-37
RAM0-2
38
SPDFG
39-42
NC
D
43
INISW
svcont
44
epcs
45
46
NC
47
CONT
xrst
48
49
VDCONT
50
ROMDATA
51
ROMCS
52
ROMCK
emph
53
54
DSPMUTE
E
55
CDMUTE
cdeject
56
57
LOADSWL
58
LOADSWR
xcs
59
60
ROM1K
xwait
61
62
CLKOUT
www
63
LOCK
64
NC
xwrite
65
F
94
1
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2
I/O
Format
O
C
I
O
C
O
C
I
I
I
I
C
I
I
O
C
O
C
O
C
I
I/O
/C
I/O
/C
O
C
O
C
O
C
O
C
I
I
O
C
I
O
C
O
C
O
C
I/O
/C
O
C
O
C
O
C
O
C
O
C
I
I
I
O
C
I
I
O
C
I
x
ao
y
O
.
i
FX-MG9107ZT/UC
2
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3
8
Function and Operation
A power supply Positive power supply(5V)
A power supply GND
The evaluation terminal for shocking proofs
Clamp SW sense input
E power supply Positive power supply
CAM motor driver output voltage change
ELV/LOAD motor driver output voltage change
IC : VSS direct connection/FLMOD0 : Pull-down
Positive power supply(5V)
y(
)
Connected to the capacity stabilizing output of the regulator
y
GND
Oscillator connection for mainclock
Oscillator connection for mainclock
System reset input
Connected to the oscillator for subclock
Connected to the oscillator for subclock(Open)
Connected to EVDD or EVSS via the resistor
The evaluation terminal for shocking proofs
CD LSI interruption signal input
g
Connected to VSS via the resistor
IIC-Bus reset input
IIC-Bus serial data input
IIC-Bus serial data output
IIC-Bus clock output
For flash rewriting(transmitted signal)
g(
For flash rewriting(received signal)
g(
g
IIC-Bus reception enable input/output
IIC-Bus request input/output
q
Not used
ELV/LOAD motor driver output change
Q Q
3
6 7
1 3
ELV/LOAD motor control output(REV)
ELV/LOAD motor control output(FWD)
E power supply GND
y
E power supply Positive power supply
y
RAM level output
SPDL FG pulse input
Not used
Disc sense input for initialization
Standard voltage change output
g
g
BBOX sense input
Not used
Servo driver power supply control output
y
CD LSI reset control output
VD power supply control output
y
E2PROM data input/output
E2PROM chip selection output
E2PROM clock output
Emphasis information output
DOUT mute output
CD mute control output
It is EJECT at the time of L detection during 1 second
Load operation sense input
Load operation sense input
CD LSI chip selection output
EEPROM 2k/1k change input
g
CD LSI write control signal output
g
Internal system clock output(Open)
y
(
Spindle lock input
u163
Not used
CD LSI write control signal output
g
.
3
4
2 9
9 4
2 8
g
g
g
g
g
g
g
g
)
)
g
1 5
0 5
8
2 9
9 4
(
)
y
g
m
)
co
4
9 9
2 8
9 9
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