ViewSonic Q51 series Service Manual page 14

Pin2, V ref Bypass, provides filtering for the internal voltage.
Pin3, Vref, sets the internal bias current level for optimum performance.
5.2 DEFLECTION CIRCUIT
The deflection circuit is achieved by a high performance and efficient solution IC 401 (TDA4841) for this monitor. All
functions are controllable by IIC –bus.
The TDA4841 provides sync. Processing with full auto sync. Capability, a flexible SMPS block and an extensive set of
geometry control facilities. Further the IC generates the drive waveforms for DC coupled vertical boosters such as
TDA486*/TDA835*.
Horizontal Oscillator
The oscillator is of the relaxation type and requires a capacitor at pin29. A resistor from pin28 to ground determines the
minimum oscillator frequency. A resistor from pin28 to pin27 defines the frequency range.
PLL 1 Phase Detector
The phase detector is a standard one using switched current sources. It compares the middle of H-sync with a fixed
point on the oscillator saw-tooth voltage. The PLL loop filter is connected to Pin26.
PLL2 Phase Detector
This phase detector is similar to the PLL1 detector and compares the line fly back pulse with the oscillator saw-tooth
voltage. The PLL2 detector thus compensates for the delay in the external H-deflection circuit by adjusting the phase of the
HDRV output pulses. The phase between H-fly back and H-sync can be controlled at pin30.
X-ray Protection
The X-ray protection input pin2 provides a voltage detector with a precise threshold. If the voltage exceeds this
threshold for a certain time, an internal latch switches the whole IC into protection mode. In this mode several pins are
forced into defined states:
Pin6 (BDRV) is floating
Pin8 (HDRV) is floating
Pin13/12 (VOUT1 and VOUT2) are floating
Vertical Oscillator
The vertical free –running the capacitor at pin24 and the resistor at pin23 determine frequency. Usually the free-running
frequency should be lower than the minimum trigger frequency.
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