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DSP-A5
QQ
3 7 63 1515 0
IC4 : YSS918D-F (AC3D2av)
DSP + AC-3(Dolby Digital)/ Pro Logic/ DTS Digital Surround Decoder
No.
Name
I/O
1
VDD1
+5V power supply
2
RAMCEN
O
RAM chip enable output terminal (normally unconnected)
3
RAMA16
O
RAM address output terminal 16, connected to external 1M SRAM address
4
RAMA15
O
RAM address output terminal 15, connected to external 1M SRAM address
5
SDIB0
I
Serial data input B terminal 0 (normally connected to ground)
6
SDIB1
I
Serial data input B terminal 1 (normally connected to ground)
7
SDIB2
I
Serial data input B terminal 2 (normally connected to ground)
8
XI
I
Crystal oscillator connection or external clock input terminal, connected to external DIR5 master clock output
9
XO
O
Crystal oscillator connection (normally unconnected)
10
VSS
Ground
11
AVDD
+3V power supply
12
SDIB3
I
Serial data input B terminal 3 (normally unconnected)
13
TEST
Test terminal (normally unconnected)
14
TEST
Test terminal (normally unconnected)
15
OVFB
O
Overflow detect terminal (normally unconnected)
16
DTSDATA
O
DTS data detect terminal (normally unconnected)
17
AC3DATA
O
AC-3 data detect terminal (normally unconnected)
O
18
SDOB3
Serial data output B terminal 3 (normally unconnected)
19
CPO
O
PLL output terminal (connected to AVSS through external analog filter)
20
AVSS
Ground
21
VDD
+3V power supply
22
SDOA2
O
Serial data output A terminal 2 (normally unconnected)
23
SDOA1
O
Serial data output A terminal 1 (normally unconnected)
24
SDOA0
O
Serial data output A terminal 0 connected to external ADC serial data input
TE
L 13942296513
25
RAMA14
O
RAM address terminal 14 output terminal, connected to external 1M SRAM address
26
RAMA13
O
RAM address terminal 13 output terminal, connected to external 1M SRAM address
27
RAMA12
O
RAM address terminal 12 output terminal, connected to external 1M SRAM address
28
RAMA11
O
RAM address terminal 11 output terminal, connected to external 1M SRAM address
29
RAMA10
O
RAM address terminal 10 output terminal, connected to external 1M SRAM address
30
VSS
Ground
31
VDD1
+5V power supply
32
OPORT0
O
Output expansion port terminal 0, digital input selector A output (DIA *)
33
OPORT1
O
Output expansion port terminal 1, digital input selector B output (DIB *)
34
OPORT2
O
Output expansion port terminal 2 (normally unconnected)
35
OPORT3
O
Output expansion port terminal 3, compulsive analog performance mode (KM1) output
36
OPORT4
O
Output expansion port terminal 4, connected to external CODEC initial clear input
37
OPORT5
O
Output expansion port terminal 5, PRO LOGIC decode output (H:PRO LOGIC decode)
38
OPORT6
O
Output expansion port terminal 6 (normally unconnected)
39
OPORT7
O
Output expansion port terminal 7 (normally unconnected)
40
VSS
Ground
41
VDD2
+3V power supply
42
RAMA9
O
RAM address output terminal 9, connected to external 1M SRAM address
43
RAMA8
O
RAM address output terminal 8, connected to external 1M SRAM address
44
RAMA7
O
RAM address output terminal 7, connected to external 1M SRAM address
45
SDOB2
O
Serial data output B terminal 2, connected to external CODEC PCM audio data output
46
SDOB1
O
Serial data output B terminal 1, connected to external CODEC PCM audio data output
47
SDOB0
O
Serial data output B terminal 0, connected to external CODEC PCM audio data output
48
SDBCK1
I
Serial data bit clock input terminal 1, connected to external DIR5 64fs bit clock output
www
49
SDWCK1
I
Serial data word clock input terminal 1, connected to external DIR5 1fs word clock output
50
VSS
Ground
* Digital Input
Digital Input DIB
.
Selector Control
(H=1, L=0)
25
http://www.xiaoyu163.com
x
ao
y
DIA
(Pin33)
(Pin32)
i
NONE
0
0
DVD/LD
0
1
CBL/SAT
1
0
D-TV
1
1
http://www.xiaoyu163.com
8
Function
Q Q
3
6 7
1 3
u163
.
2 9
9 4
2 8
1 5
0 5
8
2 9
9 4
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9 9
2 8
9 9
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