Philips BP2.2U Service Manual page 17

Switching the PDPGO "high"
will give a visual artefact and
should only be done if really
necessary.
To part B
Service Modes, Error Codes, and Fault Finding
Off
Mains is applied
Standby Supply starts running.
+5V2, 1V2Stb, 3V3Stb and +2V5D become present.
In case of PDP 3V3 Vpr to CPU PDP becomes present.
st-by µP resets
All I/O lines have a "high" default state:
- Assert the Viper reset.
- Sound-Enable and Reset-Audio should remain "high".
- NVM power line is "high", no NVM communication possible.
Initialise I/O pins of the st-by µP, start keyboard scanning, RC
detection, P50 decoding. Wake up reasons are "off".
In case of FHP PDP: Switch PDPGO "low"
CPUGO (inverse of the stby I/O line POD-MODE) and PDPGO
are then both "low" and the PDP is in the "low power" mode.
Switch "low" the NVM power reset line. Add a 2ms delay
before trying to address the NVM to allow correct NVM
initialization.
Switch "on" all supplies by switching LOW the POD-MODE
and the ON-MODE I/O lines.
+5V, +8V6, +12VS, +12VSW and Vsound are switched on
Wait 50ms and then start polling the detect-
5V, detect-8V6 and detect-12V every 40ms.
detect-5V
received within
2900 ms after POD-MODE
toggle?
Yes
activate +5V supply detection algorithm
detect-12VSW received within
2900 ms after POD-mode
toggle?
Yes
activate +12VSW supply
detection algorithm
Enable the +1V2 supply (ENABLE-1V2)
Start polling the detect-1V2 every 40ms
To part B
Figure 5-3 "Off" to "Semi Stand-by" flowchart (part 1)
Stand-by or
Protection
If the protection state was left by short circuiting the
SDM pins, detection of a protection condition during
startup will stall the startup. Protection conditions in a
playing set will be ignored. The protection mode will
not be entered.
- Switch Sound-Enable and Reset-Audio "high".
They are "low" in the standby mode if the
standby mode lasted longer than 2s.
Switching the POD-MODE
low in an FHP PDP set
makes the CPUGO go "high"
and starts the PDP CPU.
except in an FHP PDP Cold
Boot
The availability of the supplies is checked through detect signals (delivered by
dedicated detect-IC's) going to the st-by µP. These signals are available for
+12V, +8V6, +5V, +1V2 and +2V5. A low to high transition of the signals should
occur within a certain time after toggling the standby line. If an observers is
detected before the time-out elapses, of course, the process should continue in
No FHP PDP Set?
Yes
Switch PDPGO high:
PDP should start: 5V, 8V6 and
12V are activated
detect-5V
received within
Yes
2900 ms after PDPGO
toggle?
No +12V error
SP
No need to wait for the 8V6 detection at this point.
detect-8V6 received
within 6300 ms after POD-mode toggle?
Startup shall not wait for this detection
and continue startup.
BP2.2U, BP2.3U 5.
action holder: MIPS
action holder: St-by
autonomous action
Switching the POD-MODE and the
"on" mode "low" in an SDI PDP set
makes the PDP supplies go to the
"on" mode. Within 4 seconds, a
valid LVDS must be sent to the
display to prevent protection.
(valid for V3 version)
order to minimize start up time.
No
No +5V error
SP
Yes
No
activate +8V6 supply
+8V6 error
detection algorithm
return
SP
EN 17
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