Pioneer PDP-502MX Service Manual page 28

1
PDP-502MX, PDP-502MXE
3.5 DIGITAL VIDEO ASSY SECTION
D20
CN3403
A
8
R (B)
G (B)
8
B (B)
8
8
R (A)
G (A)
8
B (A)
8
R (B)/G (B)/B (B)
R (A)/G (A)/B (A)
D22
SGLB
CN3405
B
XCLK
1
1_2CLK
3
HD
5
VD
7
IC3401, IC3402
D17
CN3402
ULK_PLL
5
CLP1
8
CLP2
9
HBLK1
10
VBLK1
11
V_STD
12
C
D13
CN3273
OSD_DATA1
4
OSD_CLK1
5
OSD_CE1
6
OSD_CLR1
7
SDATA1
8
SCLK1
9
D14
CN3271
PN_MUTEY
1
PN_MUTEX
2
PBUSY0
4
PERR0
5
IPBUSY0
6
IPERR0
7
RMT0
8
RESET_RET
D
9
D_CLK1
10
D_DATA1
11
PN_RST1
12
28
1
2
+3.3V
(IC#101)
IC1901
(PE5066A)
IP PROCESSOR
IP
I/F
Process
CLK_101
Y (16bit)
Y (8bit)
Pb (16bit)
Pb (8bit)
Pr (16bit)
Pr (8bit)
+3.3V
IC1801
Sharpness
(PE5067A)
Arrange
RGB
≠
YPbPr
YPbPr
≠
RGB
3
Sync CONT
CLAMP PULSE
CLK_102
GEN.
HD_IP
VD_IP
(IC#102)
5
+5V
IC2001
IP U-com.
2
3
+3.3V
Y (8bit)
Pb (8bit)
Pr (8bit)
(UPD4811650GF-A10)
16M SGRAM
X Speed
+3.3V
X dencity
(UPD4811650GF-A10)
16M SGRAM
+3.3V
8bit × 2
RA_102
RB_102
GA_102
ASPECT
GB_102
RATIO
CONV.
BA_102
BB_102
HD_102
Sync
Process
VD_102
DE_102
FLD_102
67
X2301
+5V
20M
X2001
67
20M
IC2301
PANEL U-com.
S2301
RST
3
4
IC1951
WRITE CLK (SYSTEM CLK)
IC1952
+3.3V
62M
8bit × 2
RAI/RBI
R
GAI/GBI
FIFO
BAI/BBI
W
7
H
V
IC2101
FLD
(PE5061A)
VLD
(IC#20)
+5V
+5V
IC2251
(PDY061A)
(PD5538B) 6
OSD IC
RGB
Ser=Para
PROCESSOR
+5V
IC2255
(MBM29F200BC-70PFTN-K)
FLASH ROM
5
+5V
TP2303
IC2256
(LC3564BM)
64k SRAM
G (IP ERR)
RG
(P ERR)
R (IP BUSY)
D2306
R (P BUSY)
G (STOP B)
D2302
4
20
MASK CONT
IC2151
(PE5062A)
R
3
CLK
G
OSD_H 6
B
OSD_V
BLK
IC2260
OSD
+3.3V
IC
(PE
DRIVE S
PATTE