Block Diagrams, Test Point Overview, And Waveforms; Block Diagram For Logic Circuit - Philips S42SD-YD09 Service Manual

Block Diagrams, Test Point Overview, and Waveforms

6.2

Block Diagram for Logic Circuit

LVDS LVDS
INPUT INPUT
( CL OCK ( CL OCK
R,G,B Data R,G,B Data
V, H Sync. V, H Sync.
DE) DE)
I2C I2C
Interfac e Interfac e
Signal Signal
LVDS
Input
(Clock
RGB data
V-H-sync.
DE)
UART
Interface
Signal
LVDS
Input
(Clock
RGB data
V-H-sync.
DE)
I2C
Interface
Signal
Lo g ic M ain Blo ck D iag ram Lo g ic M ain Blo ck D iag ram
ASIC ASIC
SPS -S101 SPS -S101
128 M 128K
DDR DDR
Figure 6-3 Block diagram (42" SD v5)
Logic Main Block Diagram
ASIC
SPS-H102
128M
DDR
Figure 6-4 Block diagram (42" HD w1)
Logic Main Block Diagram
ASIC
SPS-H102
128M
DDR
Figure 6-5 Block diagram (50" HD w1 and 63" HD v4)
SDI PDP 2K6
128M 128K
DDR DDR
128M
DDR
128M
DDR
6. EN 57
X, Y X, Y
FET FET
Control Control
TCP TCP
CLK, DATA CLK, DATA
Control Control
G_16380_222.eps
190606
X-Y
FET
Control
TCP
CLK, DATA
Control
G_16380_223.eps
190606
X-Y
FET
Control
TCP
CLK, DATA
Control
G_16380_224.eps
190606