JVC GZ-MG20EK Schematic Diagrams page 8

MAIN(V I/O) SCHEMATIC DIAGRAM
TO DSP
DV2OUT0
DV2OUT1
DV2OUT2
DV2OUT3
DV2OUT4
DV2OUT5
DV2OUT6
DV2OUT7
R3220
TO MPEG2, DSP
DV2CKOUT
TO MPEG2
VI0
VI1
VI2
VI3
VI4
VI5
VI6
VI7
MPGFLD
MPGVSYNC
MPGHSYNC
TO P.PRCS
OUTV2
IC3202
MB90099PFV137EX
1 SCLK HD 20
2 CS VD 19
3 SIN 18
VC0
4 RST VC1 17
5 VDD VC2 16
6 SDR BLKA 15
C3219 7 NC 14
VC3
0.1
8 EXD BLKB 13
TO SUB CPU 9 TEST TSTO 12
ANA_RST 10 GND BLKC 11
ANA_IN
TO MAIN IF(CN101), ANA_OUT
SUB CPU,AUDIO
ANA_CLK
ANA_CS
TO SUB CPU OSD_CS
OSD_VD
TO SUB CPU,DSP DSP_RST
TO SUB CPU PSCTL
L3201
NQR0129-002X
TO OP DRV
ASPECT
C3220
4.7
TO MAIN IF,
REG+CCD
TG133(CN105)
REG_4.8V
REG_3.1V
TO MAIN IF(CN103),
REG_2.5V
MPEG2,DSP MEM
GND
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked ( ) is not used.
0Ω
180 179 178 177 176 160 96 51 132 159 95 50 131 94 49 130 93 48 92
1 NC1
2 NC1
13 NC1
14 NC1
54 VSS
R3201 0Ω
3 RST
1 8
97 CSO0
2 7
55 CSO1
3 6 RA3201
133 CSO2
10
4 5
99 CSO3
1 8
4 YSO0
2 7
98 YSO1
3 6 RA3202
134 YSO2
10
4 5
56 YSO3
C3201 0.01
5 VDD(I/O)
TL3201 100 OUTH
R3202
0Ω
135 OUTV
R3203 TL3202 6 OUTH2
0Ω
57 OUTV2
101 ZCNT (L:OUTV,OUTH=HiZ)
R3204 0Ω
7 SDOUT
58 VDD(CORE)
C3202 0.01
102 VSS
136 CLK
R3205 0Ω
8 SDIN
R3206 0Ω
59 SCLK
R3207 0Ω
103 CS
9 VC0
60 VC1
137 VC2
104 VC3
10 BLK1
61 BLK2
138 BLK3
11 HDOUT
62 VDOUT
R3208 100
105 CLKOSD
139 HDCVF
12 VDCVF
63 VSS
161 NC2
162 NC2
163 NC2
164 NC2
165 NC2
R3209
15 26 27 28 106107140 65 16 141 66 17 108 67 18 142109 19 68 143110 20 69 144 21 70 111 71 22 112145 23 146 72 25 24 73 113114 74 166167168169170
0Ω
R3222
33
[1608]
R3221
100
Q3202
2SC4617/QR/-X
L3203
SHORT
C3224
1
SYMBOL NO. 3201~ SYMBOL NO. 3701~
LAST NO.
LAST NO. VACANT NO.
IC 3204 3203 IC 3701
Q 3202 Q 3701
L 3206 3202,3204,3205 L 3702
R 3222 R 3707 3701
RA 3202 C 3710
C 3230 3221Ω3223,3226,3228,3229
47 158 129 157 46 91 128 45 90 156 127 44 89 126 43 155 88 125 124 42 87 154 86 75 64 53
NC2 175
NC2 174
NC2 173
NC2 172
NC2 171
VSS 85
VSS(8AD) 38
VDD(8AD) 123
C3215
CIN 84 OPEN
C3214
VRH 37
OPEN
VRL 153
VRM 122
C3213
VDD(8AD) 36
OPEN
VSS(8AD) 83
C3212 SHORT
VYIN 121
CLPY 82
R3215 2.7k
IREF1 35
_0.5%
YCOUT 152
ABAR1 120
C3211 1
COMP1 34
YSOUT 81
IC3201 C3210 0.1
VREF1 151
JCP8075
VSS(10DA) 80
C3209 0.1
VDD(10DA) 33
NC 119
NC 150
NC 32
NC 79
VSS(8DA) 118
R3214
VDD(8DA) 149
2.7k
IREF2 31
_0.5%
CROUT 78
ABAR2 117
C3208 1
COMP2 148
CBOUT 77
VREF2 116
COUT 147
C3207
VDD(8DA) 115
0.01
VSS(8DA) 30
SCANI3 29
C3206
VDD(CORE) 76
0.1
NC1 52
NC1 41
NC1 40
NC2 39
R3212 R3213
18k 12k
_0.5% _0.5%
IC3204
R1100D251C-X
1 2 3
L3206
SHORT
C3225
1
C3230
C3227
OPEN
1
[1608]
SYMBOL NO. 7801~ SYMBOL NO. 7851~
VACANT NO. LAST NO. VACANT NO. LAST NO.
Q 7803 L
L 7801 R
R 7817 7806,7811,7816 C
C 7806
(No.YF108)2-13 2-14(No.YF108)
R3218 R3219
1.5k 1.5k
Q3201
UMT1N-W
1 4 C3707
C3706
1 0.01
2 5
C3708
6 3
1
R3216 R3217
820 820 8 7 6 5 4 3 2 1
_0.5% _0.5%
IC3701
LA73076V-X
9 10 11 12 13 14 15 16
L3701
C3702
10µ
2.2
L3702
10µ
C3703
C3701 C3704 C3710
10/6.3 4.7 0.1 0.1
T
C3709
10/6.3
T
6 4
2 5
Q3701
BC847PN-X
1 3
R3706
R3707 1.2k
2.2k
L7851
SHORT
L7801
C7852
SHORT
0.01
R7805 R7810 R7815
12k 12k 12k
R7801
_0.5% _0.5% _0.5%
36k
6 3 6 3 6 3
2 5 2 5 2 5
1 4 Q7801 1 4 Q7802 1 4 Q7803
C7801
C7802 UMX1N-W UMX1N-W UMX1N-W
OPEN 1/16
C7804
1/16
C7805
R7804 R7809 R7814
1/16
2.2k 2.2k 2.2k
C7806
_0.5% _0.5% _0.5%
1/16
R7803 R7808 R7813
R7802 R7807 R7812 C7803 R7817
620 620 620
8.2k
_0.5% 8.2k _0.5% 8.2k 1 _0.5% 8.2k
VACANT NO.
7851
7859 7852,7855,7858
7852 7851
0 1 MAIN(V I/O)
C3705 R3704
0.01 68 _0.5%
R3705
TO MAIN IF(CN101)
10k
C_OUT
Y_OUT
V_OUT
R3703
68 _0.5%
R3702
68 _0.5%
R7851 R7854 R7857
33k 33k 33k
_0.5% _0.5% _0.5%
TO MAIN IF
(CN101,110)
MON_G
MON_R
MON_B
HRP
VDCVF
TO MAIN IF
HDCVF
(CN101)
R7853 R7856 R7859
36k 36k 36k
_0.5% _0.5% _0.5%
y10564001a_rev0.1