JVC GZ-MG20EK Schematic Diagrams page 25

POWER SYSTEM BLOSK DIAGRAM
0 5 REAR
BATT_TERM.
TP2 (T)
TP4 (-)
TP1 (+)
J601
DC JACK
Q6003
F6001
SW Q6701
IC6002
BATT
F6002
CHARGE
CONTROL
Q6101
1.2V
REG
IC6001
Q6201
1.5V
VCC1
REG
Q6301
D3.3V
VCC2
REG
Q6401
SW
VCC3
REG
Q6501
SW
REG
F6501
OUT9
Q6103
2.5V
OUT12
REG
0 6 MONI-BL
CN7603 CN7601 CN402
VDDA REG_4.8V
1,8
16
VDD REG_3.1V
21,34 5~7
21
VDD1
22
IC7601
Q7702
CN7701 CN7602
BLREGA BL_REG
1,2 2,1
0 1 MAIN
CN6001 CN103
T_BATT
18 28
ADP_L
14 32
V_BATT
42 4
UNREGCHK
44 2
Q6703
REG_4.8V
4.8V AL_3V
11~13 35~33
REG
M_REG4.8
REG_3.1V
REG_1.2V
29~31 17~15
REG_1.5V
15~17 31~29
F6301
33~35 DRV_3.3V 13~11
REG_3.1V
Q6402
REG_3.1V
3.1V 4~6 42~40
REG
REG_4.8V
Q6404
3.1V 8,9 CAM_3.1V 38,37
AL_3.1V
REG
REG+CCD
D6501
(+15V)
45 1
Q6502 LITHIUM
Q6503
REG-CCD
D6502
REG (-7.5)
2 44
-7.5V
AL_3.1V
37,38 9,8
REG_1.5V
REG_3.1V
40,41 REG_2.5V 6,5
0 4 OPERATION
REG_3.1V
CN401 CN101
REG_4.8V REG_2.5V
1,8 12~14 34~32
D402
D421,D422
5~7 15,16 REG_3.1V 31,30
OPERATION
SW
BL_POWER
13,14 REG_4.8V
11 35
LITHIUM
38 8
BT401
REG_3.1V
REG_1.2V
J101
USBDP
USBDN
USB
nUSB_DET
(No.YF108)2-47
SUB CPU TG068
REG-CCD
REG+CCD
REG_3.1V
IC1001
IC5501
CAM_3.1V
X5501
IC1003,IC1004
IC1007
IC5502
Q1003,Q1005
REG_4.8V
3.3V
REG
Q1002
CDS
IC1002
IC4202
REG_4.8V
3.1V
REG
IC4201
MAIN IF
IC171
OP DRV
Q171
REG_4.8V
IC4901
IC121
REG_3.1V
IC4951
D191 F4951 L4954
M_REG4.8
LIT_3V
V I/O
REG_2.5V
P.PRCS
IC3201
REG_3.1V
IC3204
IC4501
SW
REG
IC4502
IC3701
IC3202
REG_4.8V
Q3701
DSP MEM
REG+CCD Q7801,Q7802
IC4301
Q7803
IC4302
COLOR SEPA
REG_3.1V IC4401
DSP
IC4402
IC4002
X4001
MPEG2
IC4003
REG_1.5V
REG_3.1V
IC3001
IC4001
REG_2.5V
IC3002
2-48(No.YF108)
CCD
0 2
CCD068
CN105
CN5001
REG_-7.5V
3,4 3,4
REG_+15V IC5001
1,2 1,2
REG_3.1V
23 23
Q5001
GYRO_CCD
IC5901
Q5952
CDS_3V
CN106
F_LED
5
Z_VCC
23
F_VCC
6
CN102
DRV_3.1V
1~3
HDD
CN111
REG_3.1V
SD CONN.
4
CN104
ZOOM
1,2 REG_3.1V
UNIT
GYRO
REG_3.1V IC5801
IC5852
AUDIO
CN109
SPK+
REG_3.1V
1
SPK-
IC2201 2
REG_4.8V
Q2401
Q2403
OP BLOCK
SPEAKER