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8. CIRCUIT DIAGRAM
1
2
2V8_VMEM
2V8_VMEM
R201
10K
J3
G2
DATA00
DQ0
A0
ADD01
G4
F2
DATA01
DQ1
A1
ADD02
A
K4
E2
DATA02
DQ2
A2
ADD03
H5
D2
DATA03
DQ3
A3
ADD04
H6
F3
DATA04
DQ4
A4
ADD05
K7
E3
DATA05
DQ5
A5
ADD06
G7
D3
DATA06
DQ6
A6
ADD07
J8
C3
DATA07
DQ7
A7
ADD08
K3
C7
DATA08
DQ8
A8
ADD09
H4
E7
DATA09
DQ9
A9
ADD10
J4
F7
DATA10
DQ10
A10
ADD11
K5
C8
DATA11
DQ11
A11
ADD12
J7
D8
DATA12
DQ12
A12
ADD13
H7
E8
DATA13
DQ13
A13
ADD14
K8
F8
DATA14
DQ14
A14
ADD15
H8
D9
DATA15
DQ15
A15
ADD16
G9
A16
ADD17
F4
A17
ADD18
J5
E4
VCCF1
A18
ADD19
G5
D7
VCCF2
A19
ADD20
J6
E6
VCCPS
A20
ADD21
E9
C204
A21
ADD22
U201
0.1u
TH50VPF5783AASB
J9
VSS0
G3
H2
VSS1
_CEF1
ROM_CS2
B
F5
_CEF2
ROM_CS1
H3
_OE
RD
A1
C6
NC0
_WE
WR
A10
H9
NC1
_BYTE
B1
NC2
B10
NC3
C1
E5
NC4
RY_BY
F1
C5
NC5
_WP_ACC
F6
D5
NC6
_RESET
RESET
F9
NC7
F10
NC8
G1
NC9
G6
C4
NC10
_LB
LBS
G10
D4
NC11
_UB
UBS
L1
J2
NC12
_CE1PS
RAM_CS
L10
D6
NC13
CE2PS
M1
K6
R207
NA
NC14
DU1
M10
G8
R210
NA
NC15
DU2
C
VBAT
C219
2.2u
(1608)
C238
10u
2V8_VMEM
2V5_JACK
U208
1
4
GND
NC
2
3
Vin
VOUT
NCP563Q25T1
C254
C255
2V5_JACK
1uF
1uF
D
R218
2V8_VMEM
C232
R219 20K
2.2K
HEADSET_MIC_N
0.1u
C250
R229
20K
R221
R222
C234
C235
33u
0.1u
39p
3.3K
1M
C236
HEADSET_MIC_P
0.1u
HEADSET_SPK_P
R214
2V8_VMEM
2V8_VMEM
330K
C237
R223
(1608)
39p
C251
1M
5
10u
VIN-
4
1
VCC
JACK_DET
OUT
3
GND
VIN+
C240
2
R220
47p
U207
E
620K
MAX9075EXK-T
1
2
LGIC(42)-A-5505-10:01
3
4
5
VBAT
2V8_VMEM
VCHARGE
VBAT
R202
100K
30
POWERKEY
_PWRONKEY
31
ROWX
KEY_ROW0
29
RPWRON
PWRONIN
28
VCHARGE
CLK_ON
TCXOEN
1
SIM_EN
SIMEN
15
RESCAP
8
10u
C203
SIMVSEL
C202
1000p
C252
0.1u
9
(2012)
R203
GATEDR
10
0.33
GATEIN
12
ISENSE
VBAT
6
CHRDET
Q201
14
CHGEN
4
S
G
BATSNS
5
4
7
D4
D3
CHRIN
D201
13
6
3
EOC
D5
D2
CUS02
7
2
D6
D1
8
1
TPCF8102
33
GND
GATE_EN
CHRDET
CHG_EN
EOC
R209
2V8_VMEM
100K
R206
10K
2V8_VMEM
2V8_VMEM
R208
0
3V3_VMIDI
R211
0
1
13MHZ
CLK1
4
U206
LP3981ILD-3.3
MIDI_RST
_RST
1
6
30
VOUT
VEN
MIDI_PWR_EN
ADD00
A0
31
RD
_RD
2
5
29
VIN
BYPASS
MIDI_CS
_CS
5
NC
3
4
VOUT_SE
GND1
C221
28
GND2
0.1u
WR
_WR
3
MIDI_IRQ
_IRQ
7
27
DATA08
D0
26
DATA09
D1
25
DATA10
D2
24
DATA11
D3
U204
23
DATA12
D4
YMU762
22
DATA13
D5
21
DATA14
D6
20
DATA15
D7
C220
R228
PLLC
6
3.3K
1000p
VREF
9
C227
0.1u
IOVDD
32
VDD
7
2V8_VMEM
C230
0.1u
VSS
8
C233
39p
5
VIN-
4
VCC
1
HOOK_DET
VIN+
3
GND
OUT
2
U205
MAX9075EXK-T
J201
5
R224
1
4.7
3
R226
4
4.7
2
VA203
VA204
C239
R227
Headset jack
C260
1M
NA
47p
AVL14K02200
AVL14K02200
SP203
SP204
SP205
3
4
5
6
7
TP201
EOC
TP202
CHRDET
C201
C253
TP203
0.1u
10u
CHG_EN
(1608)
TP204
GATE_EN
VSIM
1V8_VCORE
18
VSIM
2V55_VAN
21
VCORE
2V75_VTCXO
23
VAN
2V8_VMEM
25
2V0_VRTC
VTCXO
20
VMEM
3
VRTC
26
REFOUT
R204 100
16
_RESET
C205
C206
C207
5
MVBAT
0.1u
100p
100p
C208
C211
C209
C212
C210
C213
C214
0.22u
2.2u
2.2u
0.22u
2.2u
0.1u
0.1u
17
NC1
(1608)
(1608)
(1608)
24
(1608)
(1608)
NC2
32
R205
NC3
10K
U202
ADP3522XCP-3
BAT1
11
HPOUT_R
10
C215
HPOUT_L
R212
0.01u
33K
12
EQ1
13
EQ2
R213
C216
82K
390p
2V8_VMEM
14
EQ3
2
LED
U203
19
MTR
C217
1
39p
SPK+
2
17
SPOUT1
3
SPK-
4
SPOUT2
18
R215
3V3_VMIDI
C222
C223
5
REC_P
12
C226
SPVDD
47p
47p
15
C228
10p
10p
R216
C229
REC_N
0.1u
16
12
C231
SPVSS
10p
Section
Designer
Checked
Approved
Iss.
Notice No.
Date
Name
LG Electronics Inc.
- 92 -
8
9
10
RESET
KEY_BL1
KEY_BL2
Q202
IMX9T110
SP206
1
6
R230
2
5
KEY_BL
R231
R232
1.5K
20
20
3
4
R233
100K
R234
R235
SP207
20
20
NLAS4684MR2
10
V+
NO2
9
CN210
NO1
COM2
REC_SPK-
1
C218
8
COM1
IN2
47p
REC_SPK+
2
7
IN1
NC2
C224
C225
6
NC1
GND
VA201
SP201
SP202
10p
10p
VA202
AVL14K02200
SPK_SEL
AVL14K02200
R217
100K
Date
Sign & Name
F7100
MODEL
05/21
LEE S.Y.
2004
05/21
KIM B.Y.
2004
YOUN K.J.
DRAWING
Audio,Memory,Power
NAME
05/21
CHO J.G.
2004
DRAWING
V1.1
NO.
LG Electronics Inc.
A
B
C
D
Sheet/
Sheets
2/4
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