Sony MDS-JB940 Service Manual page 57

AU BOARD IC1 M30805SGP
Pin No. Pin Name
1 FL-DATA
2 FL-CLK
3 A1-IN
4 RMC
5 NC
6 FL-REQ
7 FL-BUSY
8 MUTE
9 RESET(AD/DA)
10 LATCH(AD/DA)
11 LD-LOW
12 LD-IN
13 LD-OUT
14 MOD
15 BYTE
16 CNVSS
17 X-CIN
18 X-COUT
19 RESET
20 X-OUT
21 VSS
22 XIN
23 VCC
24 NMI
25 DQSY
26 P-DOWN
27 SQSY
28 KEYBD-CLK
29 LDON
30 LIMIT-IN
31 A1-OUT
32 XINT
33 BUSY
34 XELT
35 WRPWR
36 I2CCLK
37 I2CDAT
38 SWDT
39 VCC
40 SRDT
41 VSS
42 SCLK
43 REC-SW
44 TX0(CLIP)
45 RX0(CLIP)
46 CLK(CLIP)
47 DIG-RST
48 SENS
49 PLAY-SW
50 XLATCH
51 OUT-SW
(SYSTEM CONTROL)
I/O
O Display tube, serial data (TxD4) for display by microprocessor
O Display tube, serial clock (CLC4) for display by microprocessor
I Control A1 input
I Remote control data input
O Not used
O Not used
O Not used
O LINE mute output
O AD/DA reset output
O AD/DA latch output
O Loading motor voltage control output
O Loading control output
O Loading control output
O RF signal superimpose ON/OFF
I Data bus selection. Fixed to Low (16-bit width)
I Processor mode selection. Fixed to Vcc
— Sub clock output (32.768KHz)
— Sub clock output (32.768KHz)
I System reset
O Main clock output (10 MHz)
I Power supply ground
I Main clock input (10 MHz)
I 3.3 V power supply
I (Fixed to High)
I Digital-in sync (DSP)*REC system
I Power down detection (Low: Power Down)
I SUBQ (pit)/ADIP (MO) SYNC*PLAY system
I Keyboard clock input
O Laser ON/OFF
I Innermost circumference detection by sled
O Control A1 output
I XINT (DSP)
O Not used
I XELT (DSP)
O Write power ON/OFF
I/O I2 communication clock (open-drain)
I/O I2 communication clock (open-drain)
O DSP (AD/DA) serial output
I 3.3 V power supply
I DSP serial input
I Power supply ground
O DSP/(AD/DA) serial clock
I Loading position detection
O CLIP serial output
I CLIP serial input
O CLIP serial clock
O Digital board reset (MDM)
I SENS terminal
I Loading position detection
O DSP latch
I Loading position detection
Description
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