Harman Kardon AVR 3600 Service Manual page 130

AVR3600
ESMT
FUNTIONAL BLOCK DIAGRAM
Address
Buffers
Latches
PIN Description
Symbol
SCK
SI
SO
CE
WP
HOLD
VDD
VSS
Elite Semiconductor Memory Technology Inc.
X-Decoder
and
Control Logic
Serial Interface
CE
SCK
SI
Pin Name
To provide the timing for serial input and
Serial Clock
output operations
To transfer commands, addresses or data
Serial Data Input serially into the device.
Data is latched on the rising edge of SCK.
To transfer data serially out of the device.
Serial Data Output
Data is shifted out on the falling edge of
SCK.
Chip Enable
To activate the device when CE is low.
The Write Protect ( WP ) pin is used to
Write Protect
enable/disable BPL bit in the status
register.
To temporality stop serial communication
Hold with SPI flash memory without resetting
the device.
Power Supply To provide power.
Ground
Flash
Y-Decoder
I/O Butters
and
Data Latches
SO WP HOLD
Functions
130
harman/kardon
F25L004A
Publication Date: Apr. 2007
Revision:
1.2 6/32